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Commit aed666e5 authored by Hsu, Kenny's avatar Hsu, Kenny Committed by John W. Linville
Browse files

iwlwifi: add tm commands for indirect register access



Create new testmode commands to suppot indirect access
of peripheral register.
- IWL_TM_CMD_APP2DEV_INDIRECT_REG_READ32
- IWL_TM_CMD_APP2DEV_INDIRECT_REG_WRITE32

Meanwhile, add affix "DIRECT" into original register access
commands for better discrimination with new commands.
- IWL_TM_CMD_APP2DEV_DIRECT_REG_READ32
- IWL_TM_CMD_APP2DEV_DIRECT_REG_WRITE32
- IWL_TM_CMD_APP2DEV_DIRECT_REG_WRITE8

Signed-off-by: default avatarKenny Hsu <kenny.hsu@intel.com>
Signed-off-by: default avatarWey-Yi Guy <wey-yi.w.guy@intel.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 9a391691
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+34 −6
Original line number Original line Diff line number Diff line
@@ -276,7 +276,7 @@ static int iwl_testmode_reg(struct ieee80211_hw *hw, struct nlattr **tb)
	IWL_INFO(priv, "testmode register access command offset 0x%x\n", ofs);
	IWL_INFO(priv, "testmode register access command offset 0x%x\n", ofs);


	switch (nla_get_u32(tb[IWL_TM_ATTR_COMMAND])) {
	switch (nla_get_u32(tb[IWL_TM_ATTR_COMMAND])) {
	case IWL_TM_CMD_APP2DEV_REG_READ32:
	case IWL_TM_CMD_APP2DEV_DIRECT_REG_READ32:
		val32 = iwl_read32(bus(priv), ofs);
		val32 = iwl_read32(bus(priv), ofs);
		IWL_INFO(priv, "32bit value to read 0x%x\n", val32);
		IWL_INFO(priv, "32bit value to read 0x%x\n", val32);


@@ -291,7 +291,7 @@ static int iwl_testmode_reg(struct ieee80211_hw *hw, struct nlattr **tb)
			IWL_DEBUG_INFO(priv,
			IWL_DEBUG_INFO(priv,
				       "Error sending msg : %d\n", status);
				       "Error sending msg : %d\n", status);
		break;
		break;
	case IWL_TM_CMD_APP2DEV_REG_WRITE32:
	case IWL_TM_CMD_APP2DEV_DIRECT_REG_WRITE32:
		if (!tb[IWL_TM_ATTR_REG_VALUE32]) {
		if (!tb[IWL_TM_ATTR_REG_VALUE32]) {
			IWL_DEBUG_INFO(priv,
			IWL_DEBUG_INFO(priv,
				       "Error finding value to write\n");
				       "Error finding value to write\n");
@@ -302,7 +302,7 @@ static int iwl_testmode_reg(struct ieee80211_hw *hw, struct nlattr **tb)
			iwl_write32(bus(priv), ofs, val32);
			iwl_write32(bus(priv), ofs, val32);
		}
		}
		break;
		break;
	case IWL_TM_CMD_APP2DEV_REG_WRITE8:
	case IWL_TM_CMD_APP2DEV_DIRECT_REG_WRITE8:
		if (!tb[IWL_TM_ATTR_REG_VALUE8]) {
		if (!tb[IWL_TM_ATTR_REG_VALUE8]) {
			IWL_DEBUG_INFO(priv, "Error finding value to write\n");
			IWL_DEBUG_INFO(priv, "Error finding value to write\n");
			return -ENOMSG;
			return -ENOMSG;
@@ -312,6 +312,32 @@ static int iwl_testmode_reg(struct ieee80211_hw *hw, struct nlattr **tb)
			iwl_write8(bus(priv), ofs, val8);
			iwl_write8(bus(priv), ofs, val8);
		}
		}
		break;
		break;
	case IWL_TM_CMD_APP2DEV_INDIRECT_REG_READ32:
		val32 = iwl_read_prph(bus(priv), ofs);
		IWL_INFO(priv, "32bit value to read 0x%x\n", val32);

		skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, 20);
		if (!skb) {
			IWL_DEBUG_INFO(priv, "Error allocating memory\n");
			return -ENOMEM;
		}
		NLA_PUT_U32(skb, IWL_TM_ATTR_REG_VALUE32, val32);
		status = cfg80211_testmode_reply(skb);
		if (status < 0)
			IWL_DEBUG_INFO(priv,
					"Error sending msg : %d\n", status);
		break;
	case IWL_TM_CMD_APP2DEV_INDIRECT_REG_WRITE32:
		if (!tb[IWL_TM_ATTR_REG_VALUE32]) {
			IWL_DEBUG_INFO(priv,
					"Error finding value to write\n");
			return -ENOMSG;
		} else {
			val32 = nla_get_u32(tb[IWL_TM_ATTR_REG_VALUE32]);
			IWL_INFO(priv, "32bit value to write 0x%x\n", val32);
			iwl_write_prph(bus(priv), ofs, val32);
		}
		break;
	default:
	default:
		IWL_DEBUG_INFO(priv, "Unknown testmode register command ID\n");
		IWL_DEBUG_INFO(priv, "Unknown testmode register command ID\n");
		return -ENOSYS;
		return -ENOSYS;
@@ -665,9 +691,11 @@ int iwlagn_mac_testmode_cmd(struct ieee80211_hw *hw, void *data, int len)
		IWL_DEBUG_INFO(priv, "testmode cmd to uCode\n");
		IWL_DEBUG_INFO(priv, "testmode cmd to uCode\n");
		result = iwl_testmode_ucode(hw, tb);
		result = iwl_testmode_ucode(hw, tb);
		break;
		break;
	case IWL_TM_CMD_APP2DEV_REG_READ32:
	case IWL_TM_CMD_APP2DEV_DIRECT_REG_READ32:
	case IWL_TM_CMD_APP2DEV_REG_WRITE32:
	case IWL_TM_CMD_APP2DEV_DIRECT_REG_WRITE32:
	case IWL_TM_CMD_APP2DEV_REG_WRITE8:
	case IWL_TM_CMD_APP2DEV_DIRECT_REG_WRITE8:
	case IWL_TM_CMD_APP2DEV_INDIRECT_REG_READ32:
	case IWL_TM_CMD_APP2DEV_INDIRECT_REG_WRITE32:
		IWL_DEBUG_INFO(priv, "testmode cmd to register\n");
		IWL_DEBUG_INFO(priv, "testmode cmd to register\n");
		result = iwl_testmode_reg(hw, tb);
		result = iwl_testmode_reg(hw, tb);
		break;
		break;
+13 −7
Original line number Original line Diff line number Diff line
@@ -76,9 +76,9 @@
 *	the actual uCode host command ID is carried with
 *	the actual uCode host command ID is carried with
 *	IWL_TM_ATTR_UCODE_CMD_ID
 *	IWL_TM_ATTR_UCODE_CMD_ID
 *
 *
 * @IWL_TM_CMD_APP2DEV_REG_READ32:
 * @IWL_TM_CMD_APP2DEV_DIRECT_REG_READ32:
 * @IWL_TM_CMD_APP2DEV_REG_WRITE32:
 * @IWL_TM_CMD_APP2DEV_DIRECT_REG_WRITE32:
 * @IWL_TM_CMD_APP2DEV_REG_WRITE8:
 * @IWL_TM_CMD_APP2DEV_DIRECT_REG_WRITE8:
 *	commands from user applicaiton to access register
 *	commands from user applicaiton to access register
 *
 *
 * @IWL_TM_CMD_APP2DEV_GET_DEVICENAME: retrieve device name
 * @IWL_TM_CMD_APP2DEV_GET_DEVICENAME: retrieve device name
@@ -107,12 +107,16 @@
 *	commands from user application to own change the ownership of the uCode
 *	commands from user application to own change the ownership of the uCode
 *	if application has the ownership, the only host command from
 *	if application has the ownership, the only host command from
 *	testmode will deliver to uCode. Default owner is driver
 *	testmode will deliver to uCode. Default owner is driver
 * @IWL_TM_CMD_APP2DEV_INDIRECT_REG_READ32:
 * @IWL_TM_CMD_APP2DEV_INDIRECT_REG_WRITE32:
 *	commands from user applicaiton to indirectly access peripheral register
 *
 */
 */
enum iwl_tm_cmd_t {
enum iwl_tm_cmd_t {
	IWL_TM_CMD_APP2DEV_UCODE		= 1,
	IWL_TM_CMD_APP2DEV_UCODE		= 1,
	IWL_TM_CMD_APP2DEV_REG_READ32		= 2,
	IWL_TM_CMD_APP2DEV_DIRECT_REG_READ32	= 2,
	IWL_TM_CMD_APP2DEV_REG_WRITE32		= 3,
	IWL_TM_CMD_APP2DEV_DIRECT_REG_WRITE32	= 3,
	IWL_TM_CMD_APP2DEV_REG_WRITE8		= 4,
	IWL_TM_CMD_APP2DEV_DIRECT_REG_WRITE8	= 4,
	IWL_TM_CMD_APP2DEV_GET_DEVICENAME	= 5,
	IWL_TM_CMD_APP2DEV_GET_DEVICENAME	= 5,
	IWL_TM_CMD_APP2DEV_LOAD_INIT_FW		= 6,
	IWL_TM_CMD_APP2DEV_LOAD_INIT_FW		= 6,
	IWL_TM_CMD_APP2DEV_CFG_INIT_CALIB	= 7,
	IWL_TM_CMD_APP2DEV_CFG_INIT_CALIB	= 7,
@@ -126,7 +130,9 @@ enum iwl_tm_cmd_t {
	IWL_TM_CMD_DEV2APP_UCODE_RX_PKT		= 15,
	IWL_TM_CMD_DEV2APP_UCODE_RX_PKT		= 15,
	IWL_TM_CMD_DEV2APP_EEPROM_RSP		= 16,
	IWL_TM_CMD_DEV2APP_EEPROM_RSP		= 16,
	IWL_TM_CMD_APP2DEV_OWNERSHIP		= 17,
	IWL_TM_CMD_APP2DEV_OWNERSHIP		= 17,
	IWL_TM_CMD_MAX				= 18,
	IWL_TM_CMD_APP2DEV_INDIRECT_REG_READ32	= 18,
	IWL_TM_CMD_APP2DEV_INDIRECT_REG_WRITE32	= 19,
	IWL_TM_CMD_MAX				= 20,
};
};


/*
/*