Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit ad28536a authored by Kukjin Kim's avatar Kukjin Kim
Browse files

Merge branch 'next/devel-samsung-iommu' into next/devel-samsung 

Conflicts:
	arch/arm/mach-exynos/Makefile
parents 18c411b7 2a96536e

arch/arm/mach-exynos/Kconfig

+6 −4
Original line number Diff line number Diff line
@@ -90,10 +90,10 @@ config EXYNOS4_SETUP_FIMD0 
	help

	  Common setup code for FIMD0.



config EXYNOS4_DEV_SYSMMU

config EXYNOS_DEV_SYSMMU

	bool

	help

	  Common setup code for SYSTEM MMU in EXYNOS4

	  Common setup code for SYSTEM MMU in EXYNOS platforms



config EXYNOS4_DEV_DWMCI

	bool
@@ -205,12 +205,12 @@ config MACH_SMDKV310 
	select S3C_DEV_HSMMC2

	select S3C_DEV_HSMMC3

	select SAMSUNG_DEV_BACKLIGHT

	select EXYNOS_DEV_SYSMMU

	select EXYNOS4_DEV_AHCI

	select SAMSUNG_DEV_KEYPAD

	select EXYNOS4_DEV_DMA

	select SAMSUNG_DEV_PWM

	select EXYNOS4_DEV_USB_OHCI

	select EXYNOS4_DEV_SYSMMU

	select EXYNOS4_SETUP_FIMD0

	select EXYNOS4_SETUP_I2C1

	select EXYNOS4_SETUP_KEYPAD
@@ -229,7 +229,6 @@ config MACH_ARMLEX4210 
	select S3C_DEV_HSMMC3

	select EXYNOS4_DEV_AHCI

	select EXYNOS4_DEV_DMA

	select EXYNOS4_DEV_SYSMMU

	select EXYNOS4_SETUP_SDHCI

	help

	  Machine support for Samsung ARMLEX4210 based on EXYNOS4210
@@ -256,6 +255,7 @@ config MACH_UNIVERSAL_C210 
	select S5P_DEV_MFC

	select S5P_DEV_ONENAND

	select S5P_DEV_TV

	select EXYNOS_DEV_SYSMMU

	select EXYNOS4_DEV_DMA

	select EXYNOS4_SETUP_FIMD0

	select EXYNOS4_SETUP_I2C1
@@ -327,6 +327,7 @@ config MACH_ORIGEN 
	select S5P_DEV_USB_EHCI

	select SAMSUNG_DEV_BACKLIGHT

	select SAMSUNG_DEV_PWM

	select EXYNOS_DEV_SYSMMU

	select EXYNOS4_DEV_DMA

	select EXYNOS4_DEV_USB_OHCI

	select EXYNOS4_SETUP_FIMD0
@@ -350,6 +351,7 @@ config MACH_SMDK4212 
	select SAMSUNG_DEV_BACKLIGHT

	select SAMSUNG_DEV_KEYPAD

	select SAMSUNG_DEV_PWM

	select EXYNOS_DEV_SYSMMU

	select EXYNOS4_DEV_DMA

	select EXYNOS4_SETUP_I2C1

	select EXYNOS4_SETUP_I2C3

arch/arm/mach-exynos/Makefile

+2 −2
Original line number Diff line number Diff line
@@ -50,11 +50,11 @@ obj-$(CONFIG_MACH_EXYNOS5_DT) += mach-exynos5-dt.o 
obj-y					+= dev-uart.o

obj-$(CONFIG_ARCH_EXYNOS4)		+= dev-audio.o

obj-$(CONFIG_EXYNOS4_DEV_AHCI)		+= dev-ahci.o

obj-$(CONFIG_EXYNOS_DEV_DRM)		+= dev-drm.o

obj-$(CONFIG_EXYNOS4_DEV_SYSMMU)	+= dev-sysmmu.o

obj-$(CONFIG_EXYNOS4_DEV_DWMCI)		+= dev-dwmci.o

obj-$(CONFIG_EXYNOS4_DEV_DMA)		+= dma.o

obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI)	+= dev-ohci.o

obj-$(CONFIG_EXYNOS_DEV_DRM)		+= dev-drm.o

obj-$(CONFIG_EXYNOS_DEV_SYSMMU)		+= dev-sysmmu.o



obj-$(CONFIG_ARCH_EXYNOS)		+= setup-i2c0.o

obj-$(CONFIG_EXYNOS4_SETUP_FIMC)	+= setup-fimc.o

arch/arm/mach-exynos/clock-exynos4.c

+39 −40
Original line number Diff line number Diff line
@@ -168,7 +168,7 @@ static int exynos4_clk_ip_tv_ctrl(struct clk *clk, int enable) 
	return s5p_gatectrl(EXYNOS4_CLKGATE_IP_TV, clk, enable);

}



static int exynos4_clk_ip_image_ctrl(struct clk *clk, int enable)

int exynos4_clk_ip_image_ctrl(struct clk *clk, int enable)

{

	return s5p_gatectrl(EXYNOS4_CLKGATE_IP_IMAGE, clk, enable);

}
@@ -198,6 +198,11 @@ static int exynos4_clk_ip_perir_ctrl(struct clk *clk, int enable) 
	return s5p_gatectrl(EXYNOS4_CLKGATE_IP_PERIR, clk, enable);

}



int exynos4_clk_ip_dmc_ctrl(struct clk *clk, int enable)

{

	return s5p_gatectrl(EXYNOS4_CLKGATE_IP_DMC, clk, enable);

}



static int exynos4_clk_hdmiphy_ctrl(struct clk *clk, int enable)

{

	return s5p_gatectrl(S5P_HDMI_PHY_CONTROL, clk, enable);
@@ -678,61 +683,55 @@ static struct clk exynos4_init_clocks_off[] = { 
		.enable		= exynos4_clk_ip_peril_ctrl,

		.ctrlbit	= (1 << 14),

	}, {

		.name		= "SYSMMU_MDMA",

		.name		= SYSMMU_CLOCK_NAME,

		.devname	= SYSMMU_CLOCK_DEVNAME(mfc_l, 0),

		.enable		= exynos4_clk_ip_mfc_ctrl,

		.ctrlbit	= (1 << 1),

	}, {

		.name		= SYSMMU_CLOCK_NAME,

		.devname	= SYSMMU_CLOCK_DEVNAME(mfc_r, 1),

		.enable		= exynos4_clk_ip_mfc_ctrl,

		.ctrlbit	= (1 << 2),

	}, {

		.name		= SYSMMU_CLOCK_NAME,

		.devname	= SYSMMU_CLOCK_DEVNAME(tv, 2),

		.enable		= exynos4_clk_ip_tv_ctrl,

		.ctrlbit	= (1 << 4),

	}, {

		.name		= SYSMMU_CLOCK_NAME,

		.devname	= SYSMMU_CLOCK_DEVNAME(jpeg, 3),

		.enable		= exynos4_clk_ip_cam_ctrl,

		.ctrlbit	= (1 << 11),

	}, {

		.name		= SYSMMU_CLOCK_NAME,

		.devname	= SYSMMU_CLOCK_DEVNAME(rot, 4),

		.enable		= exynos4_clk_ip_image_ctrl,

		.ctrlbit	= (1 << 5),

		.ctrlbit	= (1 << 4),

	}, {

		.name		= "SYSMMU_FIMC0",

		.name		= SYSMMU_CLOCK_NAME,

		.devname	= SYSMMU_CLOCK_DEVNAME(fimc0, 5),

		.enable		= exynos4_clk_ip_cam_ctrl,

		.ctrlbit	= (1 << 7),

	}, {

		.name		= "SYSMMU_FIMC1",

		.name		= SYSMMU_CLOCK_NAME,

		.devname	= SYSMMU_CLOCK_DEVNAME(fimc1, 6),

		.enable		= exynos4_clk_ip_cam_ctrl,

		.ctrlbit	= (1 << 8),

	}, {

		.name		= "SYSMMU_FIMC2",

		.name		= SYSMMU_CLOCK_NAME,

		.devname	= SYSMMU_CLOCK_DEVNAME(fimc2, 7),

		.enable		= exynos4_clk_ip_cam_ctrl,

		.ctrlbit	= (1 << 9),

	}, {

		.name		= "SYSMMU_FIMC3",

		.name		= SYSMMU_CLOCK_NAME,

		.devname	= SYSMMU_CLOCK_DEVNAME(fimc3, 8),

		.enable		= exynos4_clk_ip_cam_ctrl,

		.ctrlbit	= (1 << 10),

	}, {

		.name		= "SYSMMU_JPEG",

		.enable		= exynos4_clk_ip_cam_ctrl,

		.ctrlbit	= (1 << 11),

	}, {

		.name		= "SYSMMU_FIMD0",

		.name		= SYSMMU_CLOCK_NAME,

		.devname	= SYSMMU_CLOCK_DEVNAME(fimd0, 10),

		.enable		= exynos4_clk_ip_lcd0_ctrl,

		.ctrlbit	= (1 << 4),

	}, {

		.name		= "SYSMMU_FIMD1",

		.enable		= exynos4_clk_ip_lcd1_ctrl,

		.ctrlbit	= (1 << 4),

	}, {

		.name		= "SYSMMU_PCIe",

		.enable		= exynos4_clk_ip_fsys_ctrl,

		.ctrlbit	= (1 << 18),

	}, {

		.name		= "SYSMMU_G2D",

		.enable		= exynos4_clk_ip_image_ctrl,

		.ctrlbit	= (1 << 3),

	}, {

		.name		= "SYSMMU_ROTATOR",

		.enable		= exynos4_clk_ip_image_ctrl,

		.ctrlbit	= (1 << 4),

	}, {

		.name		= "SYSMMU_TV",

		.enable		= exynos4_clk_ip_tv_ctrl,

		.ctrlbit	= (1 << 4),

	}, {

		.name		= "SYSMMU_MFC_L",

		.enable		= exynos4_clk_ip_mfc_ctrl,

		.ctrlbit	= (1 << 1),

	}, {

		.name		= "SYSMMU_MFC_R",

		.enable		= exynos4_clk_ip_mfc_ctrl,

		.ctrlbit	= (1 << 2),

	}

};

arch/arm/mach-exynos/clock-exynos4.h

+2 −0
Original line number Diff line number Diff line
@@ -26,5 +26,7 @@ extern struct clk *exynos4_clkset_group_list[]; 
extern int exynos4_clksrc_mask_fsys_ctrl(struct clk *clk, int enable);

extern int exynos4_clk_ip_fsys_ctrl(struct clk *clk, int enable);

extern int exynos4_clk_ip_lcd1_ctrl(struct clk *clk, int enable);

extern int exynos4_clk_ip_image_ctrl(struct clk *clk, int enable);

extern int exynos4_clk_ip_dmc_ctrl(struct clk *clk, int enable);



#endif /* __ASM_ARCH_CLOCK_H */

arch/arm/mach-exynos/clock-exynos4210.c

+11 −0
Original line number Diff line number Diff line
@@ -26,6 +26,7 @@ 
#include <mach/hardware.h>

#include <mach/map.h>

#include <mach/regs-clock.h>

#include <mach/sysmmu.h>



#include "common.h"

#include "clock-exynos4.h"
@@ -94,6 +95,16 @@ static struct clk init_clocks_off[] = { 
		.devname	= "exynos4-fb.1",

		.enable		= exynos4_clk_ip_lcd1_ctrl,

		.ctrlbit	= (1 << 0),

	}, {

		.name		= SYSMMU_CLOCK_NAME,

		.devname	= SYSMMU_CLOCK_DEVNAME(2d, 14),

		.enable		= exynos4_clk_ip_image_ctrl,

		.ctrlbit	= (1 << 3),

	}, {

		.name		= SYSMMU_CLOCK_NAME,

		.devname	= SYSMMU_CLOCK_DEVNAME(fimd1, 11),

		.enable		= exynos4_clk_ip_lcd1_ctrl,

		.ctrlbit	= (1 << 4),

	},

};