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Commit acf7d768 authored by Benjamin Herrenschmidt's avatar Benjamin Herrenschmidt Committed by Paul Mackerras
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[POWERPC] cell: add RAS support



This is a first version of support for the Cell BE "Reliability,
Availability and Serviceability" features.

It doesn't yet handle some of the RAS interrupts (the ones described in
iic_is/iic_irr), I'm still working on a proper way to expose these. They
are essentially a cascaded controller by themselves (sic !) though I may
just handle them locally to the iic driver. I need also to sync with
David Erb on the way he hooked in the performance monitor interrupt.

So that's all for 2.6.17 and I'll do more work on that with my rework of
the powerpc interrupt layer that I'm hacking on at the moment.

Signed-off-by: default avatarArnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
parent ef82a306
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+1 −0
Original line number Original line Diff line number Diff line
@@ -133,6 +133,7 @@ CONFIG_CELL_IIC=y
#
#
CONFIG_SPU_FS=m
CONFIG_SPU_FS=m
CONFIG_SPUFS_MMAP=y
CONFIG_SPUFS_MMAP=y
CONFIG_CBE_RAS=y


#
#
# Kernel options
# Kernel options
+29 −0
Original line number Original line Diff line number Diff line
@@ -316,6 +316,21 @@ label##_pSeries: \
	mtspr	SPRN_SPRG1,r13;		/* save r13 */	\
	mtspr	SPRN_SPRG1,r13;		/* save r13 */	\
	EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common)
	EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common)


#define HSTD_EXCEPTION_PSERIES(n, label)		\
	. = n;						\
	.globl label##_pSeries;				\
label##_pSeries:					\
	HMT_MEDIUM;					\
	mtspr	SPRN_SPRG1,r20;		/* save r20 */	\
	mfspr	r20,SPRN_HSRR0;		/* copy HSRR0 to SRR0 */ \
	mtspr	SPRN_SRR0,r20;				\
	mfspr	r20,SPRN_HSRR1;		/* copy HSRR0 to SRR0 */ \
	mtspr	SPRN_SRR1,r20;				\
	mfspr	r20,SPRN_SPRG1;		/* restore r20 */ \
	mtspr	SPRN_SPRG1,r13;		/* save r13 */	\
	EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common)


#define STD_EXCEPTION_ISERIES(n, label, area)		\
#define STD_EXCEPTION_ISERIES(n, label, area)		\
	.globl label##_iSeries;				\
	.globl label##_iSeries;				\
label##_iSeries:					\
label##_iSeries:					\
@@ -544,8 +559,17 @@ system_call_pSeries:


	STD_EXCEPTION_PSERIES(0xf20, altivec_unavailable)
	STD_EXCEPTION_PSERIES(0xf20, altivec_unavailable)


#ifdef CONFIG_CBE_RAS
	HSTD_EXCEPTION_PSERIES(0x1200, cbe_system_error)
#endif /* CONFIG_CBE_RAS */
	STD_EXCEPTION_PSERIES(0x1300, instruction_breakpoint)
	STD_EXCEPTION_PSERIES(0x1300, instruction_breakpoint)
#ifdef CONFIG_CBE_RAS
	HSTD_EXCEPTION_PSERIES(0x1600, cbe_maintenance)
#endif /* CONFIG_CBE_RAS */
	STD_EXCEPTION_PSERIES(0x1700, altivec_assist)
	STD_EXCEPTION_PSERIES(0x1700, altivec_assist)
#ifdef CONFIG_CBE_RAS
	HSTD_EXCEPTION_PSERIES(0x1800, cbe_thermal)
#endif /* CONFIG_CBE_RAS */


	. = 0x3000
	. = 0x3000


@@ -827,6 +851,11 @@ machine_check_common:
#else
#else
	STD_EXCEPTION_COMMON(0x1700, altivec_assist, .unknown_exception)
	STD_EXCEPTION_COMMON(0x1700, altivec_assist, .unknown_exception)
#endif
#endif
#ifdef CONFIG_CBE_RAS
	STD_EXCEPTION_COMMON(0x1200, cbe_system_error, .cbe_system_error_exception)
	STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, .cbe_maintenance_exception)
	STD_EXCEPTION_COMMON(0x1800, cbe_thermal, .cbe_thermal_exception)
#endif /* CONFIG_CBE_RAS */


/*
/*
 * Here we have detected that the kernel stack pointer is bad.
 * Here we have detected that the kernel stack pointer is bad.
+43 −0
Original line number Original line Diff line number Diff line
@@ -2105,3 +2105,46 @@ int prom_update_property(struct device_node *np,
	return 0;
	return 0;
}
}



/* Find the device node for a given logical cpu number, also returns the cpu
 * local thread number (index in ibm,interrupt-server#s) if relevant and
 * asked for (non NULL)
 */
struct device_node *of_get_cpu_node(int cpu, unsigned int *thread)
{
	int hardid;
	struct device_node *np;

	hardid = get_hard_smp_processor_id(cpu);

	for_each_node_by_type(np, "cpu") {
		u32 *intserv;
		unsigned int plen, t;

		/* Check for ibm,ppc-interrupt-server#s. If it doesn't exist
		 * fallback to "reg" property and assume no threads
		 */
		intserv = (u32 *)get_property(np, "ibm,ppc-interrupt-server#s",
					      &plen);
		if (intserv == NULL) {
			u32 *reg = (u32 *)get_property(np, "reg", NULL);
			if (reg == NULL)
				continue;
			if (*reg == hardid) {
				if (thread)
					*thread = 0;
				return np;
			}
		} else {
			plen /= sizeof(u32);
			for (t = 0; t < plen; t++) {
				if (hardid == intserv[t]) {
					if (thread)
						*thread = t;
					return np;
				}
			}
		}
	}
	return NULL;
}
+4 −0
Original line number Original line Diff line number Diff line
@@ -16,4 +16,8 @@ config SPUFS_MMAP
	select MEMORY_HOTPLUG
	select MEMORY_HOTPLUG
	default y
	default y


config CBE_RAS
	bool "RAS features for bare metal Cell BE"
	default y

endmenu
endmenu
+2 −1
Original line number Original line Diff line number Diff line
obj-y			+= interrupt.o iommu.o setup.o spider-pic.o
obj-y			+= interrupt.o iommu.o setup.o spider-pic.o
obj-y			+= pervasive.o
obj-y			+= cbe_regs.o pervasive.o
obj-$(CONFIG_CBE_RAS)	+= ras.o


obj-$(CONFIG_SMP)	+= smp.o
obj-$(CONFIG_SMP)	+= smp.o
obj-$(CONFIG_SPU_FS)	+= spu-base.o spufs/
obj-$(CONFIG_SPU_FS)	+= spu-base.o spufs/
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