Loading drivers/mmc/host/sdhci.c +15 −8 Original line number Diff line number Diff line Loading @@ -748,6 +748,17 @@ static void sdhci_set_timeout(struct sdhci_host *host, struct mmc_command *cmd) } } static void sdhci_set_blk_size_reg(struct sdhci_host *host, unsigned int blksz, unsigned int sdma_boundary) { if (host->flags & SDHCI_USE_ADMA) sdhci_writew(host, SDHCI_MAKE_BLKSZ(0, blksz), SDHCI_BLOCK_SIZE); else sdhci_writew(host, SDHCI_MAKE_BLKSZ(sdma_boundary, blksz), SDHCI_BLOCK_SIZE); } static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command *cmd) { u8 ctrl; Loading Loading @@ -880,8 +891,7 @@ static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command *cmd) sdhci_set_transfer_irqs(host); /* Set the DMA boundary value and block size */ sdhci_writew(host, SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG, data->blksz), SDHCI_BLOCK_SIZE); sdhci_set_blk_size_reg(host, data->blksz, SDHCI_DEFAULT_BOUNDARY_ARG); sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT); } Loading Loading @@ -2056,14 +2066,11 @@ static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode) */ if (cmd.opcode == MMC_SEND_TUNING_BLOCK_HS200) { if (mmc->ios.bus_width == MMC_BUS_WIDTH_8) sdhci_writew(host, SDHCI_MAKE_BLKSZ(7, 128), SDHCI_BLOCK_SIZE); sdhci_set_blk_size_reg(host, 128, 7); else if (mmc->ios.bus_width == MMC_BUS_WIDTH_4) sdhci_writew(host, SDHCI_MAKE_BLKSZ(7, 64), SDHCI_BLOCK_SIZE); sdhci_set_blk_size_reg(host, 64, 7); } else { sdhci_writew(host, SDHCI_MAKE_BLKSZ(7, 64), SDHCI_BLOCK_SIZE); sdhci_set_blk_size_reg(host, 64, 7); } /* Loading Loading
drivers/mmc/host/sdhci.c +15 −8 Original line number Diff line number Diff line Loading @@ -748,6 +748,17 @@ static void sdhci_set_timeout(struct sdhci_host *host, struct mmc_command *cmd) } } static void sdhci_set_blk_size_reg(struct sdhci_host *host, unsigned int blksz, unsigned int sdma_boundary) { if (host->flags & SDHCI_USE_ADMA) sdhci_writew(host, SDHCI_MAKE_BLKSZ(0, blksz), SDHCI_BLOCK_SIZE); else sdhci_writew(host, SDHCI_MAKE_BLKSZ(sdma_boundary, blksz), SDHCI_BLOCK_SIZE); } static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command *cmd) { u8 ctrl; Loading Loading @@ -880,8 +891,7 @@ static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command *cmd) sdhci_set_transfer_irqs(host); /* Set the DMA boundary value and block size */ sdhci_writew(host, SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG, data->blksz), SDHCI_BLOCK_SIZE); sdhci_set_blk_size_reg(host, data->blksz, SDHCI_DEFAULT_BOUNDARY_ARG); sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT); } Loading Loading @@ -2056,14 +2066,11 @@ static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode) */ if (cmd.opcode == MMC_SEND_TUNING_BLOCK_HS200) { if (mmc->ios.bus_width == MMC_BUS_WIDTH_8) sdhci_writew(host, SDHCI_MAKE_BLKSZ(7, 128), SDHCI_BLOCK_SIZE); sdhci_set_blk_size_reg(host, 128, 7); else if (mmc->ios.bus_width == MMC_BUS_WIDTH_4) sdhci_writew(host, SDHCI_MAKE_BLKSZ(7, 64), SDHCI_BLOCK_SIZE); sdhci_set_blk_size_reg(host, 64, 7); } else { sdhci_writew(host, SDHCI_MAKE_BLKSZ(7, 64), SDHCI_BLOCK_SIZE); sdhci_set_blk_size_reg(host, 64, 7); } /* Loading