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Commit abc330f5 authored by Anirudh Ghayal's avatar Anirudh Ghayal
Browse files

power: qpnp-qg: Update vbat_low handling in QG 



On PMI632 2.0, the vbat_log irq can fire at both
edges. Make sure that the change to fifo-length
takes place on all vbat_low events.

While at it, add documentation for a 'qcom,qg-ext-sns'
DT property.

Change-Id: I32e1c42e58f739b277943ff07863249a1c40a4d1
Signed-off-by: default avatarAnirudh Ghayal <aghayal@codeaurora.org>
parent 5fd80ed0

Documentation/devicetree/bindings/power/supply/qcom/qpnp-qg.txt

+6 −0
Original line number Diff line number Diff line
@@ -295,6 +295,12 @@ First Level Node - QGAUGE device 
		    attempted by QG. If not defined the value defaults

		    to 10%.



- qcom,qg-ext-sns

	Usage:      optional

	Value type: <bool>

	Definition: Boolean property to support external-rsense based

		    configuration.



==========================================================

Second Level Nodes - Peripherals managed by QGAUGE driver

==========================================================

drivers/power/supply/qcom/qpnp-qg.c

+13 −10
Original line number Diff line number Diff line
@@ -453,11 +453,12 @@ static int qg_process_rt_fifo(struct qpnp_qg *chip) 


#define MIN_FIFO_FULL_TIME_MS			12000

static int process_rt_fifo_data(struct qpnp_qg *chip,

				bool vbat_low, bool update_smb)

			bool update_vbat_low, bool update_smb)

{

	int rc = 0;

	ktime_t now = ktime_get();

	s64 time_delta;

	u8 fifo_length;



	/*

	 * Reject the FIFO read event if there are back-to-back requests
@@ -466,10 +467,11 @@ static int process_rt_fifo_data(struct qpnp_qg *chip, 
	 */

	time_delta = ktime_ms_delta(now, chip->last_user_update_time);



	qg_dbg(chip, QG_DEBUG_FIFO, "time_delta=%lld ms vbat_low=%d\n",

				time_delta, vbat_low);

	qg_dbg(chip, QG_DEBUG_FIFO, "time_delta=%lld ms update_vbat_low=%d update_smb=%d\n",

				time_delta, update_vbat_low, update_smb);



	if (time_delta > MIN_FIFO_FULL_TIME_MS || vbat_low || update_smb) {

	if (time_delta > MIN_FIFO_FULL_TIME_MS || update_vbat_low

						|| update_smb) {

		rc = qg_master_hold(chip, true);

		if (rc < 0) {

			pr_err("Failed to hold master, rc=%d\n", rc);
@@ -482,17 +484,18 @@ static int process_rt_fifo_data(struct qpnp_qg *chip, 
			goto done;

		}



		if (vbat_low) {

		if (update_vbat_low) {

			/* change FIFO length */

			rc = qg_update_fifo_length(chip,

					chip->dt.s2_vbat_low_fifo_length);

			fifo_length = chip->vbat_low ?

					chip->dt.s2_vbat_low_fifo_length :

					chip->dt.s2_fifo_length;

			rc = qg_update_fifo_length(chip, fifo_length);

			if (rc < 0)

				goto done;



			qg_dbg(chip, QG_DEBUG_STATUS,

				"FIFO length updated to %d vbat_low=%d\n",

					chip->dt.s2_vbat_low_fifo_length,

					vbat_low);

					fifo_length, chip->vbat_low);

		}



		if (update_smb) {
@@ -1165,7 +1168,7 @@ static irqreturn_t qg_vbat_low_handler(int irq, void *data) 


	chip->vbat_low = !!(status & VBAT_LOW_INT_RT_STS_BIT);



	rc = process_rt_fifo_data(chip, chip->vbat_low, false);

	rc = process_rt_fifo_data(chip, true, false);

	if (rc < 0)

		pr_err("Failed to process RT FIFO data, rc=%d\n", rc);