Loading drivers/gpu/msm/adreno_ringbuffer.c +9 −9 Original line number Diff line number Diff line Loading @@ -537,6 +537,9 @@ adreno_ringbuffer_addcmds(struct adreno_ringbuffer *rb, total_sizedwords += 1; } if (gpudev->set_marker) total_sizedwords += 4; ringcmds = adreno_ringbuffer_allocspace(rb, total_sizedwords); if (IS_ERR(ringcmds)) return PTR_ERR(ringcmds); Loading @@ -556,6 +559,9 @@ adreno_ringbuffer_addcmds(struct adreno_ringbuffer *rb, *ringcmds++ = KGSL_CMD_INTERNAL_IDENTIFIER; } if (gpudev->set_marker) ringcmds += gpudev->set_marker(ringcmds, 1); if (flags & KGSL_CMD_FLAGS_PWRON_FIXUP) { /* Disable protected mode for the fixup */ *ringcmds++ = cp_packet(adreno_dev, CP_SET_PROTECTED_MODE, 1); Loading Loading @@ -674,6 +680,9 @@ adreno_ringbuffer_addcmds(struct adreno_ringbuffer *rb, *ringcmds++ = timestamp; } if (gpudev->set_marker) ringcmds += gpudev->set_marker(ringcmds, 0); if (adreno_is_a3xx(adreno_dev)) { /* Dummy set-constant to trigger context rollover */ *ringcmds++ = cp_packet(adreno_dev, CP_SET_CONSTANT, 2); Loading Loading @@ -898,9 +907,6 @@ int adreno_ringbuffer_submitcmd(struct adreno_device *adreno_dev, dwords += 8; } if (gpudev->set_marker) dwords += 4; if (gpudev->ccu_invalidate) dwords += 4; Loading Loading @@ -933,9 +939,6 @@ int adreno_ringbuffer_submitcmd(struct adreno_device *adreno_dev, gpu_ticks_submitted)); } if (gpudev->set_marker) cmds += gpudev->set_marker(cmds, 1); if (numibs) { list_for_each_entry(ib, &cmdobj->cmdlist, node) { /* Loading @@ -960,9 +963,6 @@ int adreno_ringbuffer_submitcmd(struct adreno_device *adreno_dev, if (gpudev->ccu_invalidate) cmds += gpudev->ccu_invalidate(adreno_dev, cmds); if (gpudev->set_marker) cmds += gpudev->set_marker(cmds, 0); if (adreno_is_preemption_execution_enabled(adreno_dev)) { if (gpudev->preemption_yield_enable) cmds += gpudev->preemption_yield_enable(cmds); Loading Loading
drivers/gpu/msm/adreno_ringbuffer.c +9 −9 Original line number Diff line number Diff line Loading @@ -537,6 +537,9 @@ adreno_ringbuffer_addcmds(struct adreno_ringbuffer *rb, total_sizedwords += 1; } if (gpudev->set_marker) total_sizedwords += 4; ringcmds = adreno_ringbuffer_allocspace(rb, total_sizedwords); if (IS_ERR(ringcmds)) return PTR_ERR(ringcmds); Loading @@ -556,6 +559,9 @@ adreno_ringbuffer_addcmds(struct adreno_ringbuffer *rb, *ringcmds++ = KGSL_CMD_INTERNAL_IDENTIFIER; } if (gpudev->set_marker) ringcmds += gpudev->set_marker(ringcmds, 1); if (flags & KGSL_CMD_FLAGS_PWRON_FIXUP) { /* Disable protected mode for the fixup */ *ringcmds++ = cp_packet(adreno_dev, CP_SET_PROTECTED_MODE, 1); Loading Loading @@ -674,6 +680,9 @@ adreno_ringbuffer_addcmds(struct adreno_ringbuffer *rb, *ringcmds++ = timestamp; } if (gpudev->set_marker) ringcmds += gpudev->set_marker(ringcmds, 0); if (adreno_is_a3xx(adreno_dev)) { /* Dummy set-constant to trigger context rollover */ *ringcmds++ = cp_packet(adreno_dev, CP_SET_CONSTANT, 2); Loading Loading @@ -898,9 +907,6 @@ int adreno_ringbuffer_submitcmd(struct adreno_device *adreno_dev, dwords += 8; } if (gpudev->set_marker) dwords += 4; if (gpudev->ccu_invalidate) dwords += 4; Loading Loading @@ -933,9 +939,6 @@ int adreno_ringbuffer_submitcmd(struct adreno_device *adreno_dev, gpu_ticks_submitted)); } if (gpudev->set_marker) cmds += gpudev->set_marker(cmds, 1); if (numibs) { list_for_each_entry(ib, &cmdobj->cmdlist, node) { /* Loading @@ -960,9 +963,6 @@ int adreno_ringbuffer_submitcmd(struct adreno_device *adreno_dev, if (gpudev->ccu_invalidate) cmds += gpudev->ccu_invalidate(adreno_dev, cmds); if (gpudev->set_marker) cmds += gpudev->set_marker(cmds, 0); if (adreno_is_preemption_execution_enabled(adreno_dev)) { if (gpudev->preemption_yield_enable) cmds += gpudev->preemption_yield_enable(cmds); Loading