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Commit aa134f1b authored by Pavel Machek's avatar Pavel Machek Committed by Ingo Molnar
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x86: iommu: use symbolic constants, not hardcoded numbers



Move symbolic constants into gart.h, and use them instead of hardcoded
constant.

Signed-off-by: default avatarPavel Machek <pavel@suse.cz>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
parent 492c2e47
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+5 −5
Original line number Original line Diff line number Diff line
@@ -598,13 +598,13 @@ static __init int init_k8_gatt(struct agp_kern_info *info)
		dev = k8_northbridges[i];
		dev = k8_northbridges[i];
		gatt_reg = __pa(gatt) >> 12;
		gatt_reg = __pa(gatt) >> 12;
		gatt_reg <<= 4;
		gatt_reg <<= 4;
		pci_write_config_dword(dev, 0x98, gatt_reg);
		pci_write_config_dword(dev, AMD64_GARTTABLEBASE, gatt_reg);
		pci_read_config_dword(dev, 0x90, &ctl);
		pci_read_config_dword(dev, AMD64_GARTAPERTURECTL, &ctl);


		ctl |= 1;
		ctl |= GARTEN;
		ctl &= ~((1<<4) | (1<<5));
		ctl &= ~(DISGARTCPU | DISGARTIO);


		pci_write_config_dword(dev, 0x90, ctl);
		pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, ctl);
	}
	}
	flush_gart();
	flush_gart();


+3 −22
Original line number Original line Diff line number Diff line
@@ -16,28 +16,9 @@
#include <asm/page.h>		/* PAGE_SIZE */
#include <asm/page.h>		/* PAGE_SIZE */
#include <asm/e820.h>
#include <asm/e820.h>
#include <asm/k8.h>
#include <asm/k8.h>
#include <asm/gart.h>
#include "agp.h"
#include "agp.h"


/* PTE bits. */
#define GPTE_VALID	1
#define GPTE_COHERENT	2

/* Aperture control register bits. */
#define GARTEN		(1<<0)
#define DISGARTCPU	(1<<4)
#define DISGARTIO	(1<<5)

/* GART cache control register bits. */
#define INVGART		(1<<0)
#define GARTPTEERR	(1<<1)

/* K8 On-cpu GART registers */
#define AMD64_GARTAPERTURECTL	0x90
#define AMD64_GARTAPERTUREBASE	0x94
#define AMD64_GARTTABLEBASE	0x98
#define AMD64_GARTCACHECTL	0x9c
#define AMD64_GARTEN		(1<<0)

/* NVIDIA K8 registers */
/* NVIDIA K8 registers */
#define NVIDIA_X86_64_0_APBASE		0x10
#define NVIDIA_X86_64_0_APBASE		0x10
#define NVIDIA_X86_64_1_APBASE1		0x50
#define NVIDIA_X86_64_1_APBASE1		0x50
+21 −0
Original line number Original line Diff line number Diff line
@@ -5,6 +5,7 @@ extern void pci_iommu_shutdown(void);
extern void no_iommu_init(void);
extern void no_iommu_init(void);
extern int force_iommu, no_iommu;
extern int force_iommu, no_iommu;
extern int iommu_detected;
extern int iommu_detected;
extern int agp_amd64_init(void);
#ifdef CONFIG_GART_IOMMU
#ifdef CONFIG_GART_IOMMU
extern void gart_iommu_init(void);
extern void gart_iommu_init(void);
extern void gart_iommu_shutdown(void);
extern void gart_iommu_shutdown(void);
@@ -31,4 +32,24 @@ static inline void gart_iommu_shutdown(void)


#endif
#endif


/* PTE bits. */
#define GPTE_VALID	1
#define GPTE_COHERENT	2

/* Aperture control register bits. */
#define GARTEN		(1<<0)
#define DISGARTCPU	(1<<4)
#define DISGARTIO	(1<<5)

/* GART cache control register bits. */
#define INVGART		(1<<0)
#define GARTPTEERR	(1<<1)

/* K8 On-cpu GART registers */
#define AMD64_GARTAPERTURECTL	0x90
#define AMD64_GARTAPERTUREBASE	0x94
#define AMD64_GARTTABLEBASE	0x98
#define AMD64_GARTCACHECTL	0x9c
#define AMD64_GARTEN		(1<<0)

#endif
#endif