Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit a9ae9de2 authored by Shrenuj Bansal's avatar Shrenuj Bansal
Browse files

msm: kgsl: Add properties for MinAccessLength and UBWC Mode 



On A6xx, KGSL needs to program the MinAcessLength and UBWC Mode,
which would be specified through the devicetree, into multiple
protected registers. We also need to pass this information to
the UMD driver. Hence add properties for these two fields to
propagate this information to the UMD.

Change-Id: If37db813d46075bf64472658919f8416556c40a0
Signed-off-by: default avatarShrenuj Bansal <shrenujb@codeaurora.org>
parent ae67281c

Documentation/devicetree/bindings/gpu/adreno.txt

+14 −1
Original line number Diff line number Diff line
@@ -124,7 +124,20 @@ Optional Properties: 
				Specify the bit of the highest DDR bank. This

				is programmed into protected registers and also

				passed to the user as a property.



- qcom,min-access-length:

				Specify the minimum access length for the chip.

				Either 32 or 64 bytes.

				Based on the above options, program the appropriate bit into

				certain protected registers and also pass to the user as

				a property.

- qcom,ubwc-mode:

				Specify the ubwc mode for this chip.

				1: UBWC 1.0

				2: UBWC 2.0

				3: UBWC 3.0

				Based on the ubwc mode, program the appropriate bit into

				certain protected registers and also pass to the user as

				a property.

- qcom,l2pc-cpu-mask:

				Disables L2PC on masked CPUs when any of Graphics

				rendering thread is running on masked CPUs.

drivers/gpu/msm/adreno.c

+42 −0
Original line number Diff line number Diff line
@@ -1860,6 +1860,48 @@ static int adreno_getproperty(struct kgsl_device *device, 
		}

		status = 0;

		break;

	case KGSL_PROP_MIN_ACCESS_LENGTH:

		{

			unsigned int mal;



			if (sizebytes < sizeof(unsigned int)) {

				status = -EINVAL;

				break;

			}



			if (of_property_read_u32(device->pdev->dev.of_node,

				"qcom,min-access-length", &mal)) {

				mal = 0;

			}



			if (copy_to_user(value, &mal, sizeof(mal))) {

				status = -EFAULT;

				break;

			}

		}

		status = 0;

		break;

	case KGSL_PROP_UBWC_MODE:

		{

			unsigned int mode;



			if (sizebytes < sizeof(unsigned int)) {

				status = -EINVAL;

				break;

			}



			if (of_property_read_u32(device->pdev->dev.of_node,

				"qcom,ubwc-mode", &mode))

				mode = 0;



			if (copy_to_user(value, &mode, sizeof(mode))) {

				status = -EFAULT;

				break;

			}

		}

		status = 0;

		break;



	case KGSL_PROP_DEVICE_BITNESS:

	{

		unsigned int bitness = 32;

include/uapi/linux/msm_kgsl.h

+8 −0
Original line number Diff line number Diff line
@@ -222,6 +222,12 @@ enum kgsl_user_mem_type { 
/* Server Side Sync Timeout in milliseconds */

#define KGSL_SYNCOBJ_SERVER_TIMEOUT 2000



/* UBWC Modes */

#define KGSL_UBWC_NONE	0

#define KGSL_UBWC_1_0	1

#define KGSL_UBWC_2_0	2

#define KGSL_UBWC_3_0	3



/*

 * Reset status values for context

 */
@@ -319,6 +325,8 @@ enum kgsl_timestamp_type { 
#define KGSL_PROP_HIGHEST_BANK_BIT	0x17

#define KGSL_PROP_DEVICE_BITNESS	0x18

#define KGSL_PROP_DEVICE_QDSS_STM	0x19

#define KGSL_PROP_MIN_ACCESS_LENGTH	0x1A

#define KGSL_PROP_UBWC_MODE		0x1B



struct kgsl_shadowprop {

	unsigned long gpuaddr;