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Commit a9a552f0 authored by Liu Shuo's avatar Liu Shuo Committed by David Woodhouse
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mtd: nand: use elbc_fcm_ctrl->oob to set FPAR_MS bit of FPAR 



On both of large-page chip and small-page chip, we always should use
'elbc_fcm_ctrl->oob' to set the FPAR_LP_MS/FPAR_SP_MS bit of FPAR, don't
use a overflowed 'column' to set it.

Signed-off-by: default avatarLiu Shuo <b35362@freescale.com>
Signed-off-by: default avatarLi Yang <leoli@freescale.com>
Signed-off-by: default avatarArtem Bityutskiy <Artem.Bityutskiy@linux.intel.com>
Signed-off-by: default avatarDavid Woodhouse <David.Woodhouse@intel.com>
parent b604436c

drivers/mtd/nand/fsl_elbc_nand.c

+11 −7
Original line number Original line Diff line number Diff line
@@ -407,9 +407,17 @@ static void fsl_elbc_cmdfunc(struct mtd_info *mtd, unsigned int command, 
		         page_addr, column);

		         page_addr, column);





		elbc_fcm_ctrl->column = column;

		elbc_fcm_ctrl->column = column;

		elbc_fcm_ctrl->oob = 0;

		elbc_fcm_ctrl->use_mdr = 1;

		elbc_fcm_ctrl->use_mdr = 1;





		if (column >= mtd->writesize) {

			/* OOB area */

			column -= mtd->writesize;

			elbc_fcm_ctrl->oob = 1;

		} else {

			WARN_ON(column != 0);

			elbc_fcm_ctrl->oob = 0;

		}



		fcr = (NAND_CMD_STATUS   << FCR_CMD1_SHIFT) |

		fcr = (NAND_CMD_STATUS   << FCR_CMD1_SHIFT) |

		      (NAND_CMD_SEQIN    << FCR_CMD2_SHIFT) |

		      (NAND_CMD_SEQIN    << FCR_CMD2_SHIFT) |

		      (NAND_CMD_PAGEPROG << FCR_CMD3_SHIFT);

		      (NAND_CMD_PAGEPROG << FCR_CMD3_SHIFT);
@@ -434,17 +442,13 @@ static void fsl_elbc_cmdfunc(struct mtd_info *mtd, unsigned int command, 
			         (FIR_OP_CW1 << FIR_OP6_SHIFT) |

			         (FIR_OP_CW1 << FIR_OP6_SHIFT) |

			         (FIR_OP_RS  << FIR_OP7_SHIFT));

			         (FIR_OP_RS  << FIR_OP7_SHIFT));





			if (column >= mtd->writesize) {

			if (elbc_fcm_ctrl->oob)

				/* OOB area --> READOOB */

				/* OOB area --> READOOB */

				column -= mtd->writesize;

				fcr |= NAND_CMD_READOOB << FCR_CMD0_SHIFT;

				fcr |= NAND_CMD_READOOB << FCR_CMD0_SHIFT;

				elbc_fcm_ctrl->oob = 1;

			else

			} else {

				WARN_ON(column != 0);

				/* First 256 bytes --> READ0 */

				/* First 256 bytes --> READ0 */

				fcr |= NAND_CMD_READ0 << FCR_CMD0_SHIFT;

				fcr |= NAND_CMD_READ0 << FCR_CMD0_SHIFT;

		}

		}

		}





		out_be32(&lbc->fcr, fcr);

		out_be32(&lbc->fcr, fcr);

		set_addr(mtd, column, page_addr, elbc_fcm_ctrl->oob);

		set_addr(mtd, column, page_addr, elbc_fcm_ctrl->oob);