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Commit a9a07d40 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'for-upstream' of git://openrisc.net/jonas/linux 

Pull OpenRISC updates from Jonas Bonn:
 "An equal number of bug fixes and trivial cleanups; no new features.

   - Two patches to fix errors thrown by the updated toolchain.

   - Three other bug fixes.

   - Four trivial cleanups."

* 'for-upstream' of git://openrisc.net/jonas/linux:
  openrisc: add missing header inclusion
  openrisc: really pass correct arg to schedule_tail
  Add bitops include needed for ext2 filesystem
  openrisc: update DTLB-miss handler last
  openrisc: fix up vmalloc page table loading
  openrisc idle: delete pm_idle
  openrisc: remove CONFIG_SYMBOL_PREFIX
  openrisc: avoid using function parameter regs in reset vector
  openrisc: remove unused current_regs
parents 2003cd90 160d8378

arch/openrisc/Kconfig

+0 −4
Original line number Original line Diff line number Diff line
@@ -26,10 +26,6 @@ config OPENRISC 
config MMU

config MMU

	def_bool y

	def_bool y





config SYMBOL_PREFIX

        string

        default ""



config HAVE_DMA_ATTRS

config HAVE_DMA_ATTRS

	def_bool y

	def_bool y

arch/openrisc/include/asm/bitops.h

+1 −0
Original line number Original line Diff line number Diff line
@@ -54,6 +54,7 @@ 




#include <asm-generic/bitops/atomic.h>

#include <asm-generic/bitops/atomic.h>

#include <asm-generic/bitops/non-atomic.h>

#include <asm-generic/bitops/non-atomic.h>

#include <asm-generic/bitops/le.h>

#include <asm-generic/bitops/ext2-atomic.h>

#include <asm-generic/bitops/ext2-atomic.h>





#endif /* __ASM_GENERIC_BITOPS_H */
 
#endif /* __ASM_GENERIC_BITOPS_H */

arch/openrisc/include/asm/processor.h

+0 −1
Original line number Original line Diff line number Diff line
@@ -70,7 +70,6 @@ struct thread_struct { 
 */

 */





#define task_pt_regs(task) user_regs(task_thread_info(task))

#define task_pt_regs(task) user_regs(task_thread_info(task))

#define current_regs() user_regs(current_thread_info())





#define INIT_SP         (sizeof(init_stack) + (unsigned long) &init_stack)

#define INIT_SP         (sizeof(init_stack) + (unsigned long) &init_stack)

arch/openrisc/kernel/entry.S

+13 −3
Original line number Original line Diff line number Diff line
@@ -201,12 +201,17 @@ EXCEPTION_ENTRY(_bus_fault_handler) 
	 l.nop

	 l.nop





/* ---[ 0x300: Data Page Fault exception ]------------------------------- */

/* ---[ 0x300: Data Page Fault exception ]------------------------------- */

EXCEPTION_ENTRY(_dtlb_miss_page_fault_handler)

	l.and	r5,r5,r0

	l.j	1f

	 l.nop





EXCEPTION_ENTRY(_data_page_fault_handler)

EXCEPTION_ENTRY(_data_page_fault_handler)

	/* set up parameters for do_page_fault */

	/* set up parameters for do_page_fault */

	l.ori	r5,r0,0x300		   // exception vector

1:

	l.addi  r3,r1,0                    // pt_regs

	l.addi  r3,r1,0                    // pt_regs

	/* r4 set be EXCEPTION_HANDLE */   // effective address of fault

	/* r4 set be EXCEPTION_HANDLE */   // effective address of fault

	l.ori   r5,r0,0x300                // exception vector





	/*

	/*

	 * __PHX__: TODO

	 * __PHX__: TODO
@@ -276,12 +281,17 @@ EXCEPTION_ENTRY(_data_page_fault_handler) 
	l.nop

	l.nop





/* ---[ 0x400: Insn Page Fault exception ]------------------------------- */

/* ---[ 0x400: Insn Page Fault exception ]------------------------------- */

EXCEPTION_ENTRY(_itlb_miss_page_fault_handler)

	l.and	r5,r5,r0

	l.j	1f

	 l.nop





EXCEPTION_ENTRY(_insn_page_fault_handler)

EXCEPTION_ENTRY(_insn_page_fault_handler)

	/* set up parameters for do_page_fault */

	/* set up parameters for do_page_fault */

	l.ori	r5,r0,0x400		   // exception vector

1:

	l.addi  r3,r1,0                    // pt_regs

	l.addi  r3,r1,0                    // pt_regs

	/* r4 set be EXCEPTION_HANDLE */   // effective address of fault

	/* r4 set be EXCEPTION_HANDLE */   // effective address of fault

	l.ori   r5,r0,0x400                // exception vector

	l.ori	r6,r0,0x0		   // !write access

	l.ori	r6,r0,0x0		   // !write access





	/* call fault.c handler in or32/mm/fault.c */

	/* call fault.c handler in or32/mm/fault.c */
@@ -1040,7 +1050,7 @@ ENTRY(_switch) 
	 * we are expected to have set up the arg to schedule_tail already,

	 * we are expected to have set up the arg to schedule_tail already,

	 * hence we do so here unconditionally:

	 * hence we do so here unconditionally:

	 */

	 */

	l.lwz   r3,TI_STACK(r3)		/* Load 'prev' as schedule_tail arg */

	l.lwz   r3,TI_TASK(r3)		/* Load 'prev' as schedule_tail arg */

	l.jr	r9

	l.jr	r9

	 l.nop

	 l.nop

arch/openrisc/kernel/head.S

+6 −7
Original line number Original line Diff line number Diff line
@@ -19,6 +19,7 @@ 
#include <linux/threads.h>

#include <linux/threads.h>

#include <linux/errno.h>

#include <linux/errno.h>

#include <linux/init.h>

#include <linux/init.h>

#include <linux/serial_reg.h>

#include <asm/processor.h>

#include <asm/processor.h>

#include <asm/page.h>

#include <asm/page.h>

#include <asm/mmu.h>

#include <asm/mmu.h>
@@ -291,9 +292,9 @@ 
	/* Jump to .init code at _start which lives in the .head section

	/* Jump to .init code at _start which lives in the .head section

	 * and will be discarded after boot.

	 * and will be discarded after boot.

	 */

	 */

	LOAD_SYMBOL_2_GPR(r4, _start)

	LOAD_SYMBOL_2_GPR(r15, _start)

	tophys	(r3,r4)			/* MMU disabled */

	tophys	(r13,r15)			/* MMU disabled */

	l.jr	r3

	l.jr	r13

	 l.nop

	 l.nop





/* ---[ 0x200: BUS exception ]------------------------------------------- */

/* ---[ 0x200: BUS exception ]------------------------------------------- */
@@ -1069,8 +1070,7 @@ d_pte_not_present: 
	EXCEPTION_LOAD_GPR4

	EXCEPTION_LOAD_GPR4

	EXCEPTION_LOAD_GPR5

	EXCEPTION_LOAD_GPR5

	EXCEPTION_LOAD_GPR6

	EXCEPTION_LOAD_GPR6

	l.j	_dispatch_do_dpage_fault

	EXCEPTION_HANDLE(_dtlb_miss_page_fault_handler)

	l.nop





/* ==============================================[ ITLB miss handler ]=== */

/* ==============================================[ ITLB miss handler ]=== */

ENTRY(itlb_miss_handler)

ENTRY(itlb_miss_handler)
@@ -1192,8 +1192,7 @@ i_pte_not_present: 
	EXCEPTION_LOAD_GPR4

	EXCEPTION_LOAD_GPR4

	EXCEPTION_LOAD_GPR5

	EXCEPTION_LOAD_GPR5

	EXCEPTION_LOAD_GPR6

	EXCEPTION_LOAD_GPR6

	l.j	_dispatch_do_ipage_fault

	EXCEPTION_HANDLE(_itlb_miss_page_fault_handler)

	l.nop





/* ==============================================[ boot tlb handlers ]=== */

/* ==============================================[ boot tlb handlers ]=== */