+5
−4
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This patch makes it so that nics such as 82576 and newer can support more hardware queues when there are more than 4 cpus by combining a tx/rx queue pair onto one interrupt so that 8 queue pairs can be supported and thus allow for more queues. Signed-off-by:Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by:
Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by:
David S. Miller <davem@davemloft.net>