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Commit a998ad19 authored by Deepak Katragadda's avatar Deepak Katragadda
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clk: qcom: clk-rcg: Remove the src_freq and F_SLEW macro support



The current implementation of slewing RCG sources to custom src_freq
is flawed. It has issues with not setting the best_parent_rate and
incorrect voltage corner voting on behalf of the RCGs. Instead of
padding additional flags to work around this, remove the current
support.
If the RCG sources are to be slewed to frequencies that do not match
their divider configurations (CRC for instance), add a dummy fixed
divider to make things work. This is functionally more apt than
sending custom frequencies to sources.

Change-Id: Ife5d293439f04d72ddb0d7ac453a06d99c70f537
Signed-off-by: default avatarDeepak Katragadda <dkatraga@codeaurora.org>
parent 5b93813a
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+0 −2
Original line number Diff line number Diff line
@@ -23,8 +23,6 @@ struct freq_tbl {
	u8 pre_div;
	u16 m;
	u16 n;
	unsigned long src_freq;
#define FIXED_FREQ_SRC   0
};

/**
+1 −17
Original line number Diff line number Diff line
@@ -281,10 +281,9 @@ static int _freq_tbl_determine_rate(struct clk_hw *hw,
		const struct freq_tbl *f, struct clk_rate_request *req)
{
	unsigned long clk_flags, rate = req->rate;
	struct clk_rate_request parent_req = { };
	struct clk_hw *p;
	struct clk_rcg2 *rcg = to_clk_rcg2(hw);
	int index, ret = 0;
	int index;

	f = qcom_find_freq(f, rate);
	if (!f)
@@ -315,21 +314,6 @@ static int _freq_tbl_determine_rate(struct clk_hw *hw,
	req->best_parent_rate = rate;
	req->rate = f->freq;

	if (f->src_freq != FIXED_FREQ_SRC) {
		rate = parent_req.rate = f->src_freq;
		parent_req.best_parent_hw = p;
		ret = __clk_determine_rate(p, &parent_req);
		if (ret)
			return ret;

		ret = clk_set_rate(p->clk, parent_req.rate);
		if (ret) {
			pr_err("Failed set rate(%lu) on parent for non-fixed source\n",
							parent_req.rate);
			return ret;
		}
	}

	return 0;
}

+0 −2
Original line number Diff line number Diff line
@@ -40,8 +40,6 @@
#define DISP_CC_MISC_CMD	0x8000

#define F(f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) }
#define F_SLEW(f, s, h, m, n, src_freq) { (f), (s), (2 * (h) - 1), (m), (n), \
					(src_freq) }

static DEFINE_VDD_REGULATORS(vdd_cx, VDD_CX_NUM, 1, vdd_corner);