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Commit a97181ad authored by Hans de Goede's avatar Hans de Goede Committed by Mike Turquette
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clk: sunxi: Fixup clk_sunxi_mmc_phase_control to take a clk rather then a hw_clk 



__clk_get_hw is supposed to be used by clk providers, not clk consumers.

Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
Reviewed-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
Signed-off-by: default avatarMike Turquette <mturquette@linaro.org>
parent 8a5f93fa

drivers/clk/sunxi/clk-sunxi.c

+2 −1
Original line number Diff line number Diff line
@@ -510,11 +510,12 @@ CLK_OF_DECLARE(sun7i_a20_gmac, "allwinner,sun7i-a20-gmac-clk", 
 * clk_sunxi_mmc_phase_control() - configures MMC clock phase control

 */



void clk_sunxi_mmc_phase_control(struct clk_hw *hw, u8 sample, u8 output)

void clk_sunxi_mmc_phase_control(struct clk *clk, u8 sample, u8 output)

{

	#define to_clk_composite(_hw) container_of(_hw, struct clk_composite, hw)

	#define to_clk_factors(_hw) container_of(_hw, struct clk_factors, hw)



	struct clk_hw *hw = __clk_get_hw(clk);

	struct clk_composite *composite = to_clk_composite(hw);

	struct clk_hw *rate_hw = composite->rate_hw;

	struct clk_factors *factors = to_clk_factors(rate_hw);

include/linux/clk/sunxi.h

+1 −1
Original line number Diff line number Diff line
@@ -17,6 +17,6 @@ 


#include <linux/clk.h>



void clk_sunxi_mmc_phase_control(struct clk_hw *hw, u8 sample, u8 output);

void clk_sunxi_mmc_phase_control(struct clk *clk, u8 sample, u8 output);



#endif