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Commit a900c0b0 authored by Luca Weiss's avatar Luca Weiss
Browse files

Merge remote-tracking branch 'aosp/android-4.9-q' into int/11/fp3 

Linux 4.9.324

Change-Id: I1e3a92e3a9108c0058d7d8e79d1ada9860b3cc34
parents d30bc9cb a6491663

Documentation/networking/ip-sysctl.txt

+2 −2
Original line number Diff line number Diff line
@@ -801,7 +801,7 @@ cipso_cache_enable - BOOLEAN 
cipso_cache_bucket_size - INTEGER

	The CIPSO label cache consists of a fixed size hash table with each

	hash bucket containing a number of cache entries.  This variable limits

	the number of entries in each hash bucket; the larger the value the

	the number of entries in each hash bucket; the larger the value is, the

	more CIPSO label mappings that can be cached.  When the number of

	entries in a given hash bucket reaches this limit adding new entries

	causes the oldest entry in the bucket to be removed to make room.
@@ -874,7 +874,7 @@ ip_nonlocal_bind - BOOLEAN 
	which can be quite useful - but may break some applications.

	Default: 0



ip_dynaddr - BOOLEAN

ip_dynaddr - INTEGER

	If set non-zero, enables support for dynamic addresses.

	If set to a non-zero value larger than 1, a kernel log

	message will be printed when dynamic address rewriting

Makefile

+1 −1
Original line number Diff line number Diff line 
VERSION = 4

PATCHLEVEL = 9

SUBLEVEL = 323

SUBLEVEL = 324

EXTRAVERSION =

NAME = Roaring Lionus

arch/arm/mm/proc-v7-bugs.c

+4 −5
Original line number Diff line number Diff line
@@ -110,8 +110,7 @@ static unsigned int spectre_v2_install_workaround(unsigned int method) 
#else

static unsigned int spectre_v2_install_workaround(unsigned int method)

{

	pr_info("CPU%u: Spectre V2: workarounds disabled by configuration\n",

		smp_processor_id());

	pr_info_once("Spectre V2: workarounds disabled by configuration\n");



	return SPECTRE_VULNERABLE;

}
@@ -218,10 +217,10 @@ static int spectre_bhb_install_workaround(int method) 
			return SPECTRE_VULNERABLE;



		spectre_bhb_method = method;

	}



	pr_info("CPU%u: Spectre BHB: using %s workaround\n",

		pr_info("CPU%u: Spectre BHB: enabling %s workaround for all CPUs\n",

			smp_processor_id(), spectre_bhb_method_name(method));

	}



	return SPECTRE_MITIGATED;

}

arch/arm64/kernel/entry.S

+1 −0
Original line number Diff line number Diff line
@@ -1057,6 +1057,7 @@ __ni_sys_trace: 
	b	.

2:

	tramp_map_kernel	x30

	isb

	tramp_data_read_var	x30, vectors

	prfm	plil1strm, [x30, #(1b - \vector_start)]

	msr	vbar_el1, x30

arch/x86/kernel/head64.c

+2 −0
Original line number Diff line number Diff line
@@ -106,6 +106,8 @@ static void __init clear_bss(void) 
{

	memset(__bss_start, 0,

	       (unsigned long) __bss_stop - (unsigned long) __bss_start);

	memset(__brk_base, 0,

	       (unsigned long) __brk_limit - (unsigned long) __brk_base);

}



static unsigned long get_cmd_line_ptr(void)