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Commit a7f856d6 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'v4.8-rockchip-dts32-1' of... 

Merge tag 'v4.8-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Audio support and spi-flash on rk3288-veyron Chromedevices
as well as i2s and ethernet support on rk3228/rk3229 devices
and a dts file for the rk3229 eval board.

* tag 'v4.8-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip

:
  ARM: dts: rockchip: add support rk3229 evb board
  ARM: dts: rockchip: add GMAC nodes for RK322x SoCs
  ARM: dts: rockchip: add i2s nodes for RK322x SoCs
  ARM: dts: rockchip: rename rk3228.dtsi to rk322x.dtsi
  clk: rockchip: add clock-ids for rk3228 MAC clocks
  clk: rockchip: add clock-ids for rk3228 audio clocks
  ARM: dts: rockchip: rename i2s model for Veyron devices
  ARM: dts: rockchip: move rk3288 io-domain nodes to the grf
  ARM: dts: rockchip: Enable analog audio on rk3288-veyron chromebooks
  ARM: dts: rockchip: Add shared file for audio on rk3288-veyron boards
  ARM: dts: rockchip: add SPI flash node for rk3288-veyron

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 5fd70b1b 241eff3c

Documentation/devicetree/bindings/arm/rockchip.txt

+3 −0
Original line number Original line Diff line number Diff line
@@ -107,6 +107,9 @@ Rockchip platforms device tree bindings 
    Required root node properties:

    Required root node properties:

     - compatible = "rockchip,rk3228-evb", "rockchip,rk3228";

     - compatible = "rockchip,rk3228-evb", "rockchip,rk3228";





- Rockchip RK3229 Evaluation board:

     - compatible = "rockchip,rk3229-evb", "rockchip,rk3229";



- Rockchip RK3399 evb:

- Rockchip RK3399 evb:

    Required root node properties:

    Required root node properties:

      - compatible = "rockchip,rk3399-evb", "rockchip,rk3399";
 
      - compatible = "rockchip,rk3399-evb", "rockchip,rk3399";

arch/arm/boot/dts/Makefile

+1 −0
Original line number Original line Diff line number Diff line
@@ -617,6 +617,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ 
	rk3066a-rayeager.dtb \

	rk3066a-rayeager.dtb \

	rk3188-radxarock.dtb \

	rk3188-radxarock.dtb \

	rk3228-evb.dtb \

	rk3228-evb.dtb \

	rk3229-evb.dtb \

	rk3288-evb-act8846.dtb \

	rk3288-evb-act8846.dtb \

	rk3288-evb-rk808.dtb \

	rk3288-evb-rk808.dtb \

	rk3288-firefly-beta.dtb \

	rk3288-firefly-beta.dtb \

arch/arm/boot/dts/rk3228-evb.dts

+1 −1
Original line number Original line Diff line number Diff line
@@ -40,7 +40,7 @@ 




/dts-v1/;

/dts-v1/;





#include "rk3228.dtsi"

#include "rk322x.dtsi"





/ {

/ {

	model = "Rockchip RK3228 Evaluation board";

	model = "Rockchip RK3228 Evaluation board";

arch/arm/boot/dts/rk3229-evb.dts

0 → 100644
+90 −0
Original line number Original line Diff line number Diff line 
/*

 * This file is dual-licensed: you can use it either under the terms

 * of the GPL or the X11 license, at your option. Note that this dual

 * licensing only applies to this file, and not this project as a

 * whole.

 *

 *  a) This file is free software; you can redistribute it and/or

 *     modify it under the terms of the GNU General Public License as

 *     published by the Free Software Foundation; either version 2 of the

 *     License, or (at your option) any later version.

 *

 *     This file is distributed in the hope that it will be useful,

 *     but WITHOUT ANY WARRANTY; without even the implied warranty of

 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 *     GNU General Public License for more details.

 *

 *  Or, alternatively,

 *

 *  b) Permission is hereby granted, free of charge, to any person

 *     obtaining a copy of this software and associated documentation

 *     files (the "Software"), to deal in the Software without

 *     restriction, including without limitation the rights to use,

 *     copy, modify, merge, publish, distribute, sublicense, and/or

 *     sell copies of the Software, and to permit persons to whom the

 *     Software is furnished to do so, subject to the following

 *     conditions:

 *

 *     The above copyright notice and this permission notice shall be

 *     included in all copies or substantial portions of the Software.

 *

 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,

 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES

 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND

 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT

 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,

 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING

 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

 *     OTHER DEALINGS IN THE SOFTWARE.

 */



/dts-v1/;



#include "rk322x.dtsi"



/ {

	model = "Rockchip RK3229 Evaluation board";

	compatible = "rockchip,rk3229-evb", "rockchip,rk3229";



	memory {

		device_type = "memory";

		reg = <0x60000000 0x40000000>;

	};



	ext_gmac: ext_gmac {

		compatible = "fixed-clock";

		clock-frequency = <125000000>;

		clock-output-names = "ext_gmac";

		#clock-cells = <0>;

	};



	vcc_phy: vcc-phy-regulator {

		compatible = "regulator-fixed";

		enable-active-high;

		regulator-name = "vcc_phy";

		regulator-min-microvolt = <1800000>;

		regulator-max-microvolt = <1800000>;

		regulator-always-on;

		regulator-boot-on;

	};

};



&gmac {

	assigned-clocks = <&cru SCLK_MAC_EXTCLK>, <&cru SCLK_MAC>;

	assigned-clock-parents = <&ext_gmac>, <&cru SCLK_MAC_EXTCLK>;

	clock_in_out = "input";

	phy-supply = <&vcc_phy>;

	phy-mode = "rgmii";

	pinctrl-names = "default";

	pinctrl-0 = <&rgmii_pins>;

	snps,reset-gpio = <&gpio2 24 GPIO_ACTIVE_LOW>;

	snps,reset-active-low;

	snps,reset-delays-us = <0 10000 1000000>;

	tx_delay = <0x30>;

	rx_delay = <0x10>;

	status = "okay";

};



&uart2 {

	status = "okay";

};

arch/arm/boot/dts/rk3228.dtsi→arch/arm/boot/dts/rk322x.dtsi

+116 −2
Original line number Original line Diff line number Diff line
@@ -47,8 +47,6 @@ 
#include "skeleton.dtsi"

#include "skeleton.dtsi"





/ {

/ {

	compatible = "rockchip,rk3228";



	interrupt-parent = <&gic>;

	interrupt-parent = <&gic>;





	aliases {

	aliases {
@@ -140,6 +138,47 @@ 
		#clock-cells = <0>;

		#clock-cells = <0>;

	};

	};





	i2s1: i2s1@100b0000 {

		compatible = "rockchip,rk3228-i2s", "rockchip,rk3066-i2s";

		reg = <0x100b0000 0x4000>;

		interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;

		#address-cells = <1>;

		#size-cells = <0>;

		clock-names = "i2s_clk", "i2s_hclk";

		clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S1_8CH>;

		dmas = <&pdma 14>, <&pdma 15>;

		dma-names = "tx", "rx";

		pinctrl-names = "default";

		pinctrl-0 = <&i2s1_bus>;

		status = "disabled";

	};



	i2s0: i2s0@100c0000 {

		compatible = "rockchip,rk3228-i2s", "rockchip,rk3066-i2s";

		reg = <0x100c0000 0x4000>;

		interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;

		#address-cells = <1>;

		#size-cells = <0>;

		clock-names = "i2s_clk", "i2s_hclk";

		clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0_8CH>;

		dmas = <&pdma 11>, <&pdma 12>;

		dma-names = "tx", "rx";

		status = "disabled";

	};



	i2s2: i2s2@100e0000 {

		compatible = "rockchip,rk3228-i2s", "rockchip,rk3066-i2s";

		reg = <0x100e0000 0x4000>;

		interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;

		#address-cells = <1>;

		#size-cells = <0>;

		clock-names = "i2s_clk", "i2s_hclk";

		clocks = <&cru SCLK_I2S2>, <&cru HCLK_I2S2_2CH>;

		dmas = <&pdma 0>, <&pdma 1>;

		dma-names = "tx", "rx";

		status = "disabled";

	};



	grf: syscon@11000000 {

	grf: syscon@11000000 {

		compatible = "syscon";

		compatible = "syscon";

		reg = <0x11000000 0x1000>;

		reg = <0x11000000 0x1000>;
@@ -376,6 +415,25 @@ 
		status = "disabled";

		status = "disabled";

	};

	};





	gmac: ethernet@30200000 {

		compatible = "rockchip,rk3228-gmac";

		reg = <0x30200000 0x10000>;

		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-names = "macirq";

		clocks = <&cru SCLK_MAC>, <&cru SCLK_MAC_RX>,

			<&cru SCLK_MAC_TX>, <&cru SCLK_MAC_REF>,

			<&cru SCLK_MAC_REFOUT>, <&cru ACLK_GMAC>,

			<&cru PCLK_GMAC>;

		clock-names = "stmmaceth", "mac_clk_rx",

			"mac_clk_tx", "clk_mac_ref",

			"clk_mac_refout", "aclk_mac",

			"pclk_mac";

		resets = <&cru SRST_GMAC>;

		reset-names = "stmmaceth";

		rockchip,grf = <&grf>;

		status = "disabled";

	};



	gic: interrupt-controller@32010000 {

	gic: interrupt-controller@32010000 {

		compatible = "arm,gic-400";

		compatible = "arm,gic-400";

		interrupt-controller;

		interrupt-controller;
@@ -460,6 +518,10 @@ 
			bias-disable;

			bias-disable;

		};

		};





		pcfg_pull_none_drv_12ma: pcfg-pull-none-drv-12ma {

			drive-strength = <12>;

		};



		emmc {

		emmc {

			emmc_clk: emmc-clk {

			emmc_clk: emmc-clk {

				rockchip,pins = <2 7 RK_FUNC_2 &pcfg_pull_none>;

				rockchip,pins = <2 7 RK_FUNC_2 &pcfg_pull_none>;
@@ -481,6 +543,44 @@ 
			};

			};

		};

		};





		gmac {

			rgmii_pins: rgmii-pins {

				rockchip,pins = <2 14 RK_FUNC_1 &pcfg_pull_none>,

						<2 12 RK_FUNC_1 &pcfg_pull_none>,

						<2 25 RK_FUNC_1 &pcfg_pull_none>,

						<2 19 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,

						<2 18 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,

						<2 22 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,

						<2 23 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,

						<2 9 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,

						<2 13 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,

						<2 17 RK_FUNC_1 &pcfg_pull_none>,

						<2 16 RK_FUNC_1 &pcfg_pull_none>,

						<2 21 RK_FUNC_2 &pcfg_pull_none>,

						<2 20 RK_FUNC_2 &pcfg_pull_none>,

						<2 11 RK_FUNC_1 &pcfg_pull_none>,

						<2 8 RK_FUNC_1 &pcfg_pull_none>;

			};



			rmii_pins: rmii-pins {

				rockchip,pins = <2 14 RK_FUNC_1 &pcfg_pull_none>,

						<2 12 RK_FUNC_1 &pcfg_pull_none>,

						<2 25 RK_FUNC_1 &pcfg_pull_none>,

						<2 19 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,

						<2 18 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,

						<2 13 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,

						<2 17 RK_FUNC_1 &pcfg_pull_none>,

						<2 16 RK_FUNC_1 &pcfg_pull_none>,

						<2 8 RK_FUNC_1 &pcfg_pull_none>,

						<2 15 RK_FUNC_1 &pcfg_pull_none>;

			};



			phy_pins: phy-pins {

				rockchip,pins = <2 14 RK_FUNC_2 &pcfg_pull_none>,

						<2 8 RK_FUNC_2 &pcfg_pull_none>;

			};

		};



		i2c0 {

		i2c0 {

			i2c0_xfer: i2c0-xfer {

			i2c0_xfer: i2c0-xfer {

				rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>,

				rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>,
@@ -509,6 +609,20 @@ 
			};

			};

		};

		};





		i2s1 {

			i2s1_bus: i2s1-bus {

				rockchip,pins = <0 8 RK_FUNC_1 &pcfg_pull_none>,

						<0 9 RK_FUNC_1 &pcfg_pull_none>,

						<0 11 RK_FUNC_1 &pcfg_pull_none>,

						<0 12 RK_FUNC_1 &pcfg_pull_none>,

						<0 13 RK_FUNC_1 &pcfg_pull_none>,

						<0 14 RK_FUNC_1 &pcfg_pull_none>,

						<1 2 RK_FUNC_1 &pcfg_pull_none>,

						<1 4 RK_FUNC_1 &pcfg_pull_none>,

						<1 5 RK_FUNC_1 &pcfg_pull_none>;

			};

		};



		pwm0 {

		pwm0 {

			pwm0_pin: pwm0-pin {

			pwm0_pin: pwm0-pin {

				rockchip,pins = <3 21 RK_FUNC_1 &pcfg_pull_none>;

				rockchip,pins = <3 21 RK_FUNC_1 &pcfg_pull_none>;