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Commit a7664ab2 authored by Songjun Wu's avatar Songjun Wu Committed by Mark Brown
Browse files

ASoC: atmel-pdmic: add the Pulse Density Modulation Interface Controller 



Add driver for the Pulse Density Modulation Interface
Controller. It comes with digitallly controlled gain,
a High-Pass and a SINCC filter.

Signed-off-by: default avatarSongjun Wu <songjun.wu@atmel.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 32e69bad

sound/soc/atmel/Kconfig

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Original line number Diff line number Diff line
@@ -68,4 +68,13 @@ config SND_ATMEL_SOC_CLASSD 
	help

	  Say Y if you want to add support for Atmel ASoC driver for boards using

	  CLASSD.



config SND_ATMEL_SOC_PDMIC

	tristate "Atmel ASoC driver for boards using PDMIC"

	depends on OF && (ARCH_AT91 || COMPILE_TEST)

	select SND_SOC_GENERIC_DMAENGINE_PCM

	select REGMAP_MMIO

	help

	  Say Y if you want to add support for Atmel ASoC driver for boards using

	  PDMIC.

endif

sound/soc/atmel/Makefile

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@@ -12,8 +12,10 @@ snd-soc-sam9g20-wm8731-objs := sam9g20_wm8731.o 
snd-atmel-soc-wm8904-objs := atmel_wm8904.o

snd-soc-sam9x5-wm8731-objs := sam9x5_wm8731.o

snd-atmel-soc-classd-objs := atmel-classd.o

snd-atmel-soc-pdmic-objs := atmel-pdmic.o



obj-$(CONFIG_SND_AT91_SOC_SAM9G20_WM8731) += snd-soc-sam9g20-wm8731.o

obj-$(CONFIG_SND_ATMEL_SOC_WM8904) += snd-atmel-soc-wm8904.o

obj-$(CONFIG_SND_AT91_SOC_SAM9X5_WM8731) += snd-soc-sam9x5-wm8731.o

obj-$(CONFIG_SND_ATMEL_SOC_CLASSD) += snd-atmel-soc-classd.o

obj-$(CONFIG_SND_ATMEL_SOC_PDMIC) += snd-atmel-soc-pdmic.o

sound/soc/atmel/atmel-pdmic.c

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File added.

Preview size limit exceeded, changes collapsed.

sound/soc/atmel/atmel-pdmic.h

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#ifndef __ATMEL_PDMIC_H_

#define __ATMEL_PDMIC_H_



#include <linux/bitops.h>



#define PDMIC_CR	0x00000000



#define PDMIC_CR_SWRST		0x1

#define PDMIC_CR_SWRST_MASK	BIT(0)

#define PDMIC_CR_SWRST_SHIFT	(0)



#define PDMIC_CR_ENPDM_DIS	0x0

#define PDMIC_CR_ENPDM_EN	0x1

#define PDMIC_CR_ENPDM_MASK	BIT(4)

#define PDMIC_CR_ENPDM_SHIFT	(4)



#define PDMIC_MR	0x00000004



#define PDMIC_MR_CLKS_PCK	0x0

#define PDMIC_MR_CLKS_GCK	0x1

#define PDMIC_MR_CLKS_MASK	BIT(4)

#define PDMIC_MR_CLKS_SHIFT	(4)



#define PDMIC_MR_PRESCAL_MASK	GENMASK(14, 8)

#define PDMIC_MR_PRESCAL_SHIFT	(8)



#define PDMIC_CDR	0x00000014



#define PDMIC_IER	0x00000018

#define PDMIC_IER_OVRE			BIT(25)



#define PDMIC_IDR	0x0000001c

#define PDMIC_IDR_OVRE			BIT(25)



#define PDMIC_IMR	0x00000020



#define PDMIC_ISR	0x00000024

#define PDMIC_ISR_OVRE			BIT(25)



#define PDMIC_DSPR0	0x00000058



#define PDMIC_DSPR0_HPFBYP_DIS		0x1

#define PDMIC_DSPR0_HPFBYP_EN		0x0

#define PDMIC_DSPR0_HPFBYP_MASK		BIT(1)

#define PDMIC_DSPR0_HPFBYP_SHIFT	(1)



#define PDMIC_DSPR0_SINBYP_DIS		0x1

#define PDMIC_DSPR0_SINBYP_EN		0x0

#define PDMIC_DSPR0_SINBYP_MASK		BIT(2)

#define PDMIC_DSPR0_SINBYP_SHIFT	(2)



#define PDMIC_DSPR0_SIZE_16_BITS	0x0

#define PDMIC_DSPR0_SIZE_32_BITS	0x1

#define PDMIC_DSPR0_SIZE_MASK		BIT(3)

#define PDMIC_DSPR0_SIZE_SHIFT		(3)



#define PDMIC_DSPR0_OSR_128		0x0

#define PDMIC_DSPR0_OSR_64		0x1

#define PDMIC_DSPR0_OSR_MASK		GENMASK(6, 4)

#define PDMIC_DSPR0_OSR_SHIFT		(4)



#define PDMIC_DSPR0_SCALE_MASK		GENMASK(11, 8)

#define PDMIC_DSPR0_SCALE_SHIFT		(8)



#define PDMIC_DSPR0_SHIFT_MASK		GENMASK(15, 12)

#define PDMIC_DSPR0_SHIFT_SHIFT		(12)



#define PDMIC_DSPR1	0x0000005c



#define PDMIC_DSPR1_DGAIN_MASK		GENMASK(14, 0)

#define PDMIC_DSPR1_DGAIN_SHIFT		(0)



#define PDMIC_DSPR1_OFFSET_MASK		GENMASK(31, 16)

#define PDMIC_DSPR1_OFFSET_SHIFT	(16)



#define PDMIC_WPMR	0x000000e4



#define PDMIC_WPSR	0x000000e8



#endif