Loading arch/arm64/boot/dts/qcom/sdm845-gpu.dtsi +26 −3 Original line number Diff line number Diff line /* Copyright (c) 2017, The Linux Foundation. All rights reserved. /* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -83,10 +83,11 @@ <&clock_gpucc GPU_CC_CXO_CLK>, <&clock_gcc GCC_DDRSS_GPU_AXI_CLK>, <&clock_gcc GCC_GPU_MEMNOC_GFX_CLK>, <&clock_gpucc GPU_CC_CX_GMU_CLK>; <&clock_gpucc GPU_CC_CX_GMU_CLK>, <&clock_cpucc L3_GPU_VOTE_CLK>; clock-names = "core_clk", "rbbmtimer_clk", "mem_clk", "mem_iface_clk", "gmu_clk"; "mem_iface_clk", "gmu_clk", "l3_vote"; qcom,isense-clk-on-level = <1>; Loading Loading @@ -155,6 +156,28 @@ }; }; qcom,l3-pwrlevels { #address-cells = <1>; #size-cells = <0>; compatible = "qcom,l3-pwrlevels"; qcom,l3-pwrlevel@0 { reg = <0>; qcom,l3-freq = <0>; }; qcom,l3-pwrlevel@1 { reg = <1>; qcom,l3-freq = <806400000>; }; qcom,l3-pwrlevel@2 { reg = <2>; qcom,l3-freq = <1305600000>; }; }; /* GPU Mempools */ qcom,gpu-mempools { #address-cells = <1>; Loading arch/arm64/boot/dts/qcom/sdm845.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -1267,7 +1267,7 @@ vdd_pwrcl_mx_ao-supply = <&pm8998_s6_level_ao>; qcom,mx-turbo-freq = <1478400000 1689600000 3300000001>; l3-devs = <&l3_cpu0 &l3_cpu4 &l3_cdsp>; l3-devs = <&l3_cpu0 &l3_cpu4 &l3_cdsp &msm_gpu>; clock-names = "xo_ao"; clocks = <&clock_rpmh RPMH_CXO_CLK_A>; Loading Loading
arch/arm64/boot/dts/qcom/sdm845-gpu.dtsi +26 −3 Original line number Diff line number Diff line /* Copyright (c) 2017, The Linux Foundation. All rights reserved. /* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -83,10 +83,11 @@ <&clock_gpucc GPU_CC_CXO_CLK>, <&clock_gcc GCC_DDRSS_GPU_AXI_CLK>, <&clock_gcc GCC_GPU_MEMNOC_GFX_CLK>, <&clock_gpucc GPU_CC_CX_GMU_CLK>; <&clock_gpucc GPU_CC_CX_GMU_CLK>, <&clock_cpucc L3_GPU_VOTE_CLK>; clock-names = "core_clk", "rbbmtimer_clk", "mem_clk", "mem_iface_clk", "gmu_clk"; "mem_iface_clk", "gmu_clk", "l3_vote"; qcom,isense-clk-on-level = <1>; Loading Loading @@ -155,6 +156,28 @@ }; }; qcom,l3-pwrlevels { #address-cells = <1>; #size-cells = <0>; compatible = "qcom,l3-pwrlevels"; qcom,l3-pwrlevel@0 { reg = <0>; qcom,l3-freq = <0>; }; qcom,l3-pwrlevel@1 { reg = <1>; qcom,l3-freq = <806400000>; }; qcom,l3-pwrlevel@2 { reg = <2>; qcom,l3-freq = <1305600000>; }; }; /* GPU Mempools */ qcom,gpu-mempools { #address-cells = <1>; Loading
arch/arm64/boot/dts/qcom/sdm845.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -1267,7 +1267,7 @@ vdd_pwrcl_mx_ao-supply = <&pm8998_s6_level_ao>; qcom,mx-turbo-freq = <1478400000 1689600000 3300000001>; l3-devs = <&l3_cpu0 &l3_cpu4 &l3_cdsp>; l3-devs = <&l3_cpu0 &l3_cpu4 &l3_cdsp &msm_gpu>; clock-names = "xo_ao"; clocks = <&clock_rpmh RPMH_CXO_CLK_A>; Loading