Merge "msm: ipa3: Fix some of IPA register names" (a659c954) · Commits · e / devices / android_kernel_fairphone_FP3

drivers/platform/msm/ipa/ipa_v3/ipa_utils.c

+7 −7

Original line number	Diff line number	Diff line
		@@ -5417,7 +5417,7 @@ static void ipa_gsi_setup_reg(void)
		* Before configuring the FIFOs need to unset bit 30 in the
		* spare register
		*/
		ipahal_write_reg(IPA_SPARE_REG_1_OFST,
		ipahal_write_reg(IPA_SPARE_REG_1,
		(IPA_SPARE_REG_1_VAL & (~(1 << 30))));

		/* setup IPA_ENDP_GSI_CFG_TLV_n reg */
		@@ -5434,7 +5434,7 @@ static void ipa_gsi_setup_reg(void)
		IPADBG("Config is true");
		reg_val = (gsi_ep_info_cfg->ipa_if_tlv << 16) + start;
		start += gsi_ep_info_cfg->ipa_if_tlv;
		ipahal_write_reg_n(IPA_ENDP_GSI_CFG_TLV_OFST_n, i, reg_val);
		ipahal_write_reg_n(IPA_ENDP_GSI_CFG_TLV_n, i, reg_val);
		}

		/* setup IPA_ENDP_GSI_CFG_AOS_n reg */
		@@ -5446,7 +5446,7 @@ static void ipa_gsi_setup_reg(void)
		continue;
		reg_val = (gsi_ep_info_cfg->ipa_if_aos << 16) + start;
		start += gsi_ep_info_cfg->ipa_if_aos;
		ipahal_write_reg_n(IPA_ENDP_GSI_CFG_AOS_OFST_n, i, reg_val);
		ipahal_write_reg_n(IPA_ENDP_GSI_CFG_AOS_n, i, reg_val);
		}

		/* setup IPA_ENDP_GSI_CFG1_n reg */
		@@ -5458,7 +5458,7 @@ static void ipa_gsi_setup_reg(void)
		reg_val = (1 << 16) +
		((u32)gsi_ep_info_cfg->ipa_gsi_chan_num << 8) +
		gsi_ep_info_cfg->ee;
		ipahal_write_reg_n(IPA_ENDP_GSI_CFG1_OFST_n, i, reg_val);
		ipahal_write_reg_n(IPA_ENDP_GSI_CFG1_n, i, reg_val);
		}

		/*
		@@ -5471,16 +5471,16 @@ static void ipa_gsi_setup_reg(void)
		if (!gsi_ep_info_cfg)
		continue;
		reg_val = 1 << 31;
		ipahal_write_reg_n(IPA_ENDP_GSI_CFG2_OFST_n, i, reg_val);
		ipahal_write_reg_n(IPA_ENDP_GSI_CFG2_n, i, reg_val);
		reg_val = 0;
		ipahal_write_reg_n(IPA_ENDP_GSI_CFG2_OFST_n, i, reg_val);
		ipahal_write_reg_n(IPA_ENDP_GSI_CFG2_n, i, reg_val);
		}

		/*
		* After configuring the FIFOs need to set bit 30 in the spare
		* register
		*/
		ipahal_write_reg(IPA_SPARE_REG_1_OFST,
		ipahal_write_reg(IPA_SPARE_REG_1,
		(IPA_SPARE_REG_1_VAL \| (1 << 30)));
		}

drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_reg.c

+8 −12

Original line number	Diff line number	Diff line
		@@ -134,11 +134,10 @@ static const char *ipareg_name_to_str[IPA_REG_MAX] = {
		__stringify(IPA_MBIM_DEAGGR_FEC_ATTR_EE_n),
		__stringify(IPA_GEN_DEAGGR_FEC_ATTR_EE_n),
		__stringify(IPA_GSI_CONF),
		__stringify(IPA_ENDP_GSI_CFG1_OFST_n),
		__stringify(IPA_ENDP_GSI_CFG2_OFST_n),
		__stringify(IPA_ENDP_GSI_CFG_AOS_OFST_n),
		__stringify(IPA_ENDP_GSI_CFG_TLV_OFST_n),
		__stringify(IPA_SPARE_REG_1_OFST),
		__stringify(IPA_ENDP_GSI_CFG1_n),
		__stringify(IPA_ENDP_GSI_CFG2_n),
		__stringify(IPA_ENDP_GSI_CFG_AOS_n),
		__stringify(IPA_ENDP_GSI_CFG_TLV_n),
		};

		static void ipareg_construct_dummy(enum ipahal_reg_name reg,
		@@ -1980,21 +1979,18 @@ static struct ipahal_reg_obj ipahal_reg_objs[IPA_HW_MAX][IPA_REG_MAX] = {
		[IPA_HW_v3_5][IPA_GSI_CONF] = {
		ipareg_construct_dummy, ipareg_parse_dummy,
		0x00002790, 0x0, 0, 0, 0 },
		[IPA_HW_v3_5][IPA_ENDP_GSI_CFG1_OFST_n] = {
		[IPA_HW_v3_5][IPA_ENDP_GSI_CFG1_n] = {
		ipareg_construct_dummy, ipareg_parse_dummy,
		0x00002794, 0x4, 0, 0, 0 },
		[IPA_HW_v3_5][IPA_ENDP_GSI_CFG2_OFST_n] = {
		[IPA_HW_v3_5][IPA_ENDP_GSI_CFG2_n] = {
		ipareg_construct_dummy, ipareg_parse_dummy,
		0x00002A2C, 0x4, 0, 0, 0 },
		[IPA_HW_v3_5][IPA_ENDP_GSI_CFG_AOS_OFST_n] = {
		[IPA_HW_v3_5][IPA_ENDP_GSI_CFG_AOS_n] = {
		ipareg_construct_dummy, ipareg_parse_dummy,
		0x000029A8, 0x4, 0, 0, 0 },
		[IPA_HW_v3_5][IPA_ENDP_GSI_CFG_TLV_OFST_n] = {
		[IPA_HW_v3_5][IPA_ENDP_GSI_CFG_TLV_n] = {
		ipareg_construct_dummy, ipareg_parse_dummy,
		0x00002924, 0x4, 0, 0, 0 },
		[IPA_HW_v3_5][IPA_SPARE_REG_1_OFST] = {
		ipareg_construct_dummy, ipareg_parse_dummy,
		0x00002780, 0x0, 0, 0, 0 },

		/* IPAv4.0 */
		[IPA_HW_v4_0][IPA_IRQ_SUSPEND_INFO_EE_n] = {

drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_reg.h

+4 −5

Original line number	Diff line number	Diff line
		@@ -135,11 +135,10 @@ enum ipahal_reg_name {
		IPA_MBIM_DEAGGR_FEC_ATTR_EE_n,
		IPA_GEN_DEAGGR_FEC_ATTR_EE_n,
		IPA_GSI_CONF,
		IPA_ENDP_GSI_CFG1_OFST_n,
		IPA_ENDP_GSI_CFG2_OFST_n,
		IPA_ENDP_GSI_CFG_AOS_OFST_n,
		IPA_ENDP_GSI_CFG_TLV_OFST_n,
		IPA_SPARE_REG_1_OFST,
		IPA_ENDP_GSI_CFG1_n,
		IPA_ENDP_GSI_CFG2_n,
		IPA_ENDP_GSI_CFG_AOS_n,
		IPA_ENDP_GSI_CFG_TLV_n,
		IPA_REG_MAX,
		};