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Commit a65347ba authored by Jani Nikula's avatar Jani Nikula
Browse files

drm/i915: add has_dsi_encoder to crtc state 



DSI has quite a few special cases, like DP, so add it to crtc
state. This way we can get rid of a number of intel_pipe_has_type()
checks for DSI. This isn't necessarily the prettiest way, but it's a
step towards being aligned with what's being done with other encoders.

Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1448619706-21293-3-git-send-email-jani.nikula@intel.com
parent 70656900

drivers/gpu/drm/i915/intel_display.c

+16 −33
Original line number Diff line number Diff line
@@ -2130,7 +2130,7 @@ static void intel_enable_pipe(struct intel_crtc *crtc) 
	 * need the check.

	 */

	if (HAS_GMCH_DISPLAY(dev_priv->dev))

		if (intel_pipe_has_type(crtc, INTEL_OUTPUT_DSI))

		if (crtc->config->has_dsi_encoder)

			assert_dsi_pll_enabled(dev_priv);

		else

			assert_pll_enabled(dev_priv, pipe);
@@ -4636,7 +4636,7 @@ static void intel_crtc_load_lut(struct drm_crtc *crtc) 
		return;



	if (HAS_GMCH_DISPLAY(dev_priv->dev)) {

		if (intel_pipe_has_type(intel_crtc, INTEL_OUTPUT_DSI))

		if (intel_crtc->config->has_dsi_encoder)

			assert_dsi_pll_enabled(dev_priv);

		else

			assert_pll_enabled(dev_priv, pipe);
@@ -4946,7 +4946,6 @@ static void haswell_crtc_enable(struct drm_crtc *crtc) 
	int pipe = intel_crtc->pipe, hsw_workaround_pipe;

	struct intel_crtc_state *pipe_config =

		to_intel_crtc_state(crtc->state);

	bool is_dsi = intel_pipe_has_type(intel_crtc, INTEL_OUTPUT_DSI);



	if (WARN_ON(intel_crtc->active))

		return;
@@ -4988,7 +4987,7 @@ static void haswell_crtc_enable(struct drm_crtc *crtc) 
	if (intel_crtc->config->has_pch_encoder)

		dev_priv->display.fdi_link_train(crtc);



	if (!is_dsi)

	if (!intel_crtc->config->has_dsi_encoder)

		intel_ddi_enable_pipe_clock(intel_crtc);



	if (INTEL_INFO(dev)->gen >= 9)
@@ -5003,7 +5002,7 @@ static void haswell_crtc_enable(struct drm_crtc *crtc) 
	intel_crtc_load_lut(crtc);



	intel_ddi_set_pipe_settings(crtc);

	if (!is_dsi)

	if (!intel_crtc->config->has_dsi_encoder)

		intel_ddi_enable_transcoder_func(crtc);



	intel_update_watermarks(crtc);
@@ -5012,7 +5011,7 @@ static void haswell_crtc_enable(struct drm_crtc *crtc) 
	if (intel_crtc->config->has_pch_encoder)

		lpt_pch_enable(crtc);



	if (intel_crtc->config->dp_encoder_is_mst && !is_dsi)

	if (intel_crtc->config->dp_encoder_is_mst)

		intel_ddi_set_vc_payload_alloc(crtc, true);



	assert_vblank_disabled(crtc);
@@ -5123,7 +5122,6 @@ static void haswell_crtc_disable(struct drm_crtc *crtc) 
	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

	struct intel_encoder *encoder;

	enum transcoder cpu_transcoder = intel_crtc->config->cpu_transcoder;

	bool is_dsi = intel_pipe_has_type(intel_crtc, INTEL_OUTPUT_DSI);



	if (intel_crtc->config->has_pch_encoder)

		intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
@@ -5142,7 +5140,7 @@ static void haswell_crtc_disable(struct drm_crtc *crtc) 
	if (intel_crtc->config->dp_encoder_is_mst)

		intel_ddi_set_vc_payload_alloc(crtc, false);



	if (!is_dsi)

	if (!intel_crtc->config->has_dsi_encoder)

		intel_ddi_disable_transcoder_func(dev_priv, cpu_transcoder);



	if (INTEL_INFO(dev)->gen >= 9)
@@ -5150,7 +5148,7 @@ static void haswell_crtc_disable(struct drm_crtc *crtc) 
	else

		ironlake_pfit_disable(intel_crtc, false);



	if (!is_dsi)

	if (!intel_crtc->config->has_dsi_encoder)

		intel_ddi_disable_pipe_clock(intel_crtc);



	if (intel_crtc->config->has_pch_encoder) {
@@ -6152,13 +6150,10 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc) 
	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

	struct intel_encoder *encoder;

	int pipe = intel_crtc->pipe;

	bool is_dsi;



	if (WARN_ON(intel_crtc->active))

		return;



	is_dsi = intel_pipe_has_type(intel_crtc, INTEL_OUTPUT_DSI);



	if (intel_crtc->config->has_dp_encoder)

		intel_dp_set_m_n(intel_crtc, M1_N1);
@@ -6181,7 +6176,7 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc) 
		if (encoder->pre_pll_enable)

			encoder->pre_pll_enable(encoder);



	if (!is_dsi) {

	if (!intel_crtc->config->has_dsi_encoder) {

		if (IS_CHERRYVIEW(dev)) {

			chv_prepare_pll(intel_crtc, intel_crtc->config);

			chv_enable_pll(intel_crtc, intel_crtc->config);
@@ -6307,7 +6302,7 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc) 
		if (encoder->post_disable)

			encoder->post_disable(encoder);



	if (!intel_pipe_has_type(intel_crtc, INTEL_OUTPUT_DSI)) {

	if (!intel_crtc->config->has_dsi_encoder) {

		if (IS_CHERRYVIEW(dev))

			chv_disable_pll(dev_priv, pipe);

		else if (IS_VALLEYVIEW(dev))
@@ -7920,8 +7915,6 @@ static int i9xx_crtc_compute_clock(struct intel_crtc *crtc, 
	int refclk, num_connectors = 0;

	intel_clock_t clock;

	bool ok;

	bool is_dsi = false;

	struct intel_encoder *encoder;

	const intel_limit_t *limit;

	struct drm_atomic_state *state = crtc_state->base.state;

	struct drm_connector *connector;
@@ -7931,26 +7924,14 @@ static int i9xx_crtc_compute_clock(struct intel_crtc *crtc, 
	memset(&crtc_state->dpll_hw_state, 0,

	       sizeof(crtc_state->dpll_hw_state));



	for_each_connector_in_state(state, connector, connector_state, i) {

		if (connector_state->crtc != &crtc->base)

			continue;



		encoder = to_intel_encoder(connector_state->best_encoder);



		switch (encoder->type) {

		case INTEL_OUTPUT_DSI:

			is_dsi = true;

			break;

		default:

			break;

		}

	if (crtc_state->has_dsi_encoder)

		return 0;



	for_each_connector_in_state(state, connector, connector_state, i) {

		if (connector_state->crtc == &crtc->base)

			num_connectors++;

	}



	if (is_dsi)

		return 0;



	if (!crtc_state->clock_set) {

		refclk = i9xx_get_refclk(crtc_state, num_connectors);
@@ -12600,6 +12581,8 @@ intel_pipe_config_compare(struct drm_device *dev, 
	} else

		PIPE_CONF_CHECK_M_N_ALT(dp_m_n, dp_m2_n2);



	PIPE_CONF_CHECK_I(has_dsi_encoder);



	PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hdisplay);

	PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_htotal);

	PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hblank_start);

drivers/gpu/drm/i915/intel_drv.h

+3 −0
Original line number Diff line number Diff line
@@ -395,6 +395,9 @@ struct intel_crtc_state { 
	 * accordingly. */

	bool has_dp_encoder;



	/* DSI has special cases */

	bool has_dsi_encoder;



	/* Whether we should send NULL infoframes. Required for audio. */

	bool has_hdmi_sink;

drivers/gpu/drm/i915/intel_dsi.c

+6 −2
Original line number Diff line number Diff line
@@ -266,16 +266,18 @@ static inline bool is_cmd_mode(struct intel_dsi *intel_dsi) 
}



static bool intel_dsi_compute_config(struct intel_encoder *encoder,

				     struct intel_crtc_state *config)

				     struct intel_crtc_state *pipe_config)

{

	struct intel_dsi *intel_dsi = container_of(encoder, struct intel_dsi,

						   base);

	struct intel_connector *intel_connector = intel_dsi->attached_connector;

	struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;

	struct drm_display_mode *adjusted_mode = &config->base.adjusted_mode;

	struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;



	DRM_DEBUG_KMS("\n");



	pipe_config->has_dsi_encoder = true;



	if (fixed_mode)

		intel_fixed_panel_mode(fixed_mode, adjusted_mode);
@@ -704,6 +706,8 @@ static void intel_dsi_get_config(struct intel_encoder *encoder, 
	u32 pclk = 0;

	DRM_DEBUG_KMS("\n");



	pipe_config->has_dsi_encoder = true;



	/*

	 * DPLL_MD is not used in case of DSI, reading will get some default value

	 * set dpll_md = 0