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Commit a6260ef8 authored by Sebastian Siewior's avatar Sebastian Siewior Committed by Greg Ungerer
Browse files

m68knommu: add ffs and __ffs plattform which support ISA A+ or ISA C 



the ff1 and bitrev opcode appears in ISA C and ISA A+ what isn't
supported by all plattforms. The assembly optimization is automaticly
enabled if the compiler understand the required cpu keyword.
My m5235 seems to boot and run fine so far.

Signed-off-by: default avatarSebastian Siewior <bigeasy@linutronix.de>
Signed-off-by: default avatarGreg Ungerer <gerg@uclinux.org>
parent 5bed10a5

arch/m68knommu/Makefile

+7 −4
Original line number Diff line number Diff line
@@ -8,6 +8,8 @@ 
# (C) Copyright 2002, Greg Ungerer <gerg@snapgear.com>

#



KBUILD_DEFCONFIG := m5208evb_defconfig



platform-$(CONFIG_M68328)	:= 68328

platform-$(CONFIG_M68EZ328)	:= 68EZ328

platform-$(CONFIG_M68VZ328)	:= 68VZ328
@@ -90,13 +92,14 @@ export PLATFORM BOARD MODEL CPUCLASS 
cflags-$(CONFIG_M5206)		:= -m5200

cflags-$(CONFIG_M5206e)		:= -m5200

cflags-$(CONFIG_M520x)		:= -m5307

cflags-$(CONFIG_M523x)		:= -m5307

cflags-$(CONFIG_M523x)		:= $(call cc-option,-mcpu=523x,-m5307)

cflags-$(CONFIG_M5249)		:= -m5200

cflags-$(CONFIG_M527x)		:= -m5307

cflags-$(CONFIG_M5271)		:= $(call cc-option,-mcpu=5271,-m5307)

cflags-$(CONFIG_M5272)		:= -m5307

cflags-$(CONFIG_M528x)		:= -m5307

cflags-$(CONFIG_M5275)		:= $(call cc-option,-mcpu=5275,-m5307)

cflags-$(CONFIG_M528x)		:= $(call cc-option,-m528x,-m5307)

cflags-$(CONFIG_M5307)		:= -m5307

cflags-$(CONFIG_M532x)		:= -m5307

cflags-$(CONFIG_M532x)		:= $(call cc-option,-mcpu=532x,-m5307)

cflags-$(CONFIG_M5407)		:= -m5200

cflags-$(CONFIG_M68328)		:= -m68000

cflags-$(CONFIG_M68EZ328)	:= -m68000

include/asm-m68knommu/bitops.h

+30 −0
Original line number Diff line number Diff line
@@ -14,8 +14,38 @@ 
#error only <linux/bitops.h> can be included directly

#endif



#if defined (__mcfisaaplus__) || defined (__mcfisac__)

static inline int ffs(unsigned int val)

{

        if (!val)

                return 0;



        asm volatile(

                        "bitrev %0\n\t"

                        "ff1 %0\n\t"

                        : "=d" (val)

                        : "0" (val)

		    );

        val++;

        return val;

}



static inline int __ffs(unsigned int val)

{

        asm volatile(

                        "bitrev %0\n\t"

                        "ff1 %0\n\t"

                        : "=d" (val)

                        : "0" (val)

		    );

        return val;

}



#else

#include <asm-generic/bitops/ffs.h>

#include <asm-generic/bitops/__ffs.h>

#endif



#include <asm-generic/bitops/sched.h>

#include <asm-generic/bitops/ffz.h>