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Commit a5fc9c0b authored by Maciej W. Rozycki's avatar Maciej W. Rozycki Committed by Ralf Baechle
Browse files

Use physical addresses at the interface level, letting drivers remap 


them as appropriate.

Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 7d7ee221

arch/mips/dec/ecc-berr.c

+7 −7
Original line number Diff line number Diff line
@@ -227,11 +227,11 @@ irqreturn_t dec_ecc_be_interrupt(int irq, void *dev_id, struct pt_regs *regs) 
 */

static inline void dec_kn02_be_init(void)

{

	volatile u32 *csr = (void *)KN02_CSR_BASE;

	volatile u32 *csr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR);

	unsigned long flags;



	kn0x_erraddr = (void *)(KN02_SLOT_BASE + KN02_ERRADDR);

	kn0x_chksyn = (void *)(KN02_SLOT_BASE + KN02_CHKSYN);

	kn0x_erraddr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_ERRADDR);

	kn0x_chksyn = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CHKSYN);



	spin_lock_irqsave(&kn02_lock, flags);
@@ -250,11 +250,11 @@ static inline void dec_kn02_be_init(void) 


static inline void dec_kn03_be_init(void)

{

	volatile u32 *mcr = (void *)(KN03_SLOT_BASE + IOASIC_MCR);

	volatile u32 *mbcs = (void *)(KN4K_SLOT_BASE + KN4K_MB_CSR);

	volatile u32 *mcr = (void *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_MCR);

	volatile u32 *mbcs = (void *)CKSEG1ADDR(KN4K_SLOT_BASE + KN4K_MB_CSR);



	kn0x_erraddr = (void *)(KN03_SLOT_BASE + IOASIC_ERRADDR);

	kn0x_chksyn = (void *)(KN03_SLOT_BASE + IOASIC_CHKSYN);

	kn0x_erraddr = (void *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_ERRADDR);

	kn0x_chksyn = (void *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_CHKSYN);



	/*

	 * Set normal ECC detection and generation, enable ECC correction.

arch/mips/dec/int-handler.S

+11 −7
Original line number Diff line number Diff line
@@ -2,9 +2,9 @@ 
 * arch/mips/dec/int-handler.S

 *

 * Copyright (C) 1995, 1996, 1997 Paul M. Antoine and Harald Koerfgen

 * Copyright (C) 2000, 2001, 2002, 2003  Maciej W. Rozycki

 * Copyright (C) 2000, 2001, 2002, 2003, 2005  Maciej W. Rozycki

 *

 * Written by Ralf Baechle and Andreas Busse, modified for DECStation

 * Written by Ralf Baechle and Andreas Busse, modified for DECstation

 * support by Paul Antoine and Harald Koerfgen.

 *

 * completly rewritten:
@@ -14,11 +14,12 @@ 
 * by Maciej W. Rozycki.

 */

#include <linux/config.h>



#include <asm/addrspace.h>

#include <asm/asm.h>

#include <asm/regdef.h>

#include <asm/mipsregs.h>

#include <asm/regdef.h>

#include <asm/stackframe.h>

#include <asm/addrspace.h>



#include <asm/dec/interrupts.h>

#include <asm/dec/ioasic_addrs.h>
@@ -28,11 +29,14 @@ 
#include <asm/dec/kn02xa.h>

#include <asm/dec/kn03.h>



#define KN02_CSR_BASE		CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR)

#define KN02XA_IOASIC_BASE	CKSEG1ADDR(KN02XA_SLOT_BASE + IOASIC_IOCTL)

#define KN03_IOASIC_BASE	CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_IOCTL)



		.text

		.set	noreorder

/*

 * decstation_handle_int: Interrupt handler for DECStations

 * decstation_handle_int: Interrupt handler for DECstations

 *

 * We follow the model in the Indy interrupt code by David Miller, where he

 * says: a lot of complication here is taken away because:
@@ -48,7 +52,7 @@ 
 * 3) Linux only thinks in terms of all IRQs on or all IRQs

 *    off, nothing in between like BSD spl() brain-damage.

 *

 * Furthermore, the IRQs on the DECStations look basically (barring

 * Furthermore, the IRQs on the DECstations look basically (barring

 * software IRQs which we don't use at all) like...

 *

 * DS2100/3100's, aka kn01, aka Pmax:
@@ -61,7 +65,7 @@ 
 *             3        Lance Ethernet

 *             4        DZ11 serial

 *             5        RTC

 *             6        Memory Controller

 *             6        Memory Controller & Video

 *             7        FPU

 *

 * DS5000/200, aka kn02, aka 3max:

arch/mips/dec/kn01-berr.c

+5 −4
Original line number Diff line number Diff line
@@ -51,7 +51,7 @@ DEFINE_SPINLOCK(kn01_lock); 


static inline void dec_kn01_be_ack(void)

{

	volatile u16 *csr = (void *)(KN01_SLOT_BASE + KN01_CSR);

	volatile u16 *csr = (void *)CKSEG1ADDR(KN01_SLOT_BASE + KN01_CSR);

	unsigned long flags;



	spin_lock_irqsave(&kn01_lock, flags);
@@ -64,7 +64,8 @@ static inline void dec_kn01_be_ack(void) 


static int dec_kn01_be_backend(struct pt_regs *regs, int is_fixup, int invoker)

{

	volatile u32 *kn01_erraddr = (void *)(KN01_SLOT_BASE + KN01_ERRADDR);

	volatile u32 *kn01_erraddr = (void *)CKSEG1ADDR(KN01_SLOT_BASE +

							KN01_ERRADDR);



	static const char excstr[] = "exception";

	static const char intstr[] = "interrupt";
@@ -152,7 +153,7 @@ int dec_kn01_be_handler(struct pt_regs *regs, int is_fixup) 
irqreturn_t dec_kn01_be_interrupt(int irq, void *dev_id,

				    struct pt_regs *regs)

{

	volatile u16 *csr = (void *)(KN01_SLOT_BASE + KN01_CSR);

	volatile u16 *csr = (void *)CKSEG1ADDR(KN01_SLOT_BASE + KN01_CSR);

	int action;



	if (!(*csr & KN01_CSR_MEMERR))
@@ -178,7 +179,7 @@ irqreturn_t dec_kn01_be_interrupt(int irq, void *dev_id, 


void __init dec_kn01_be_init(void)

{

	volatile u16 *csr = (void *)(KN01_SLOT_BASE + KN01_CSR);

	volatile u16 *csr = (void *)CKSEG1ADDR(KN01_SLOT_BASE + KN01_CSR);

	unsigned long flags;



	spin_lock_irqsave(&kn01_lock, flags);

arch/mips/dec/kn02-irq.c

+6 −3
Original line number Diff line number Diff line
@@ -37,7 +37,8 @@ static int kn02_irq_base; 


static inline void unmask_kn02_irq(unsigned int irq)

{

	volatile u32 *csr = (volatile u32 *)KN02_CSR_BASE;

	volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE +

						       KN02_CSR);



	cached_kn02_csr |= (1 << (irq - kn02_irq_base + 16));

	*csr = cached_kn02_csr;
@@ -45,7 +46,8 @@ static inline void unmask_kn02_irq(unsigned int irq) 


static inline void mask_kn02_irq(unsigned int irq)

{

	volatile u32 *csr = (volatile u32 *)KN02_CSR_BASE;

	volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE +

						       KN02_CSR);



	cached_kn02_csr &= ~(1 << (irq - kn02_irq_base + 16));

	*csr = cached_kn02_csr;
@@ -105,7 +107,8 @@ static struct hw_interrupt_type kn02_irq_type = { 


void __init init_kn02_irqs(int base)

{

	volatile u32 *csr = (volatile u32 *)KN02_CSR_BASE;

	volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE +

						       KN02_CSR);

	unsigned long flags;

	int i;

arch/mips/dec/kn02xa-berr.c

+6 −5
Original line number Diff line number Diff line
@@ -20,6 +20,7 @@ 
#include <linux/kernel.h>

#include <linux/types.h>



#include <asm/addrspace.h>

#include <asm/system.h>

#include <asm/traps.h>
@@ -29,8 +30,8 @@ 


static inline void dec_kn02xa_be_ack(void)

{

	volatile u32 *mer = (void *)KN02XA_MER;

	volatile u32 *mem_intr = (void *)KN02XA_MEM_INTR;

	volatile u32 *mer = (void *)CKSEG1ADDR(KN02XA_MER);

	volatile u32 *mem_intr = (void *)CKSEG1ADDR(KN02XA_MEM_INTR);



	*mer = KN02CA_MER_INTR;		/* Clear errors; keep the ARC IRQ. */

	*mem_intr = 0;			/* Any write clears the bus IRQ. */
@@ -40,8 +41,8 @@ static inline void dec_kn02xa_be_ack(void) 
static int dec_kn02xa_be_backend(struct pt_regs *regs, int is_fixup,

				 int invoker)

{

	volatile u32 *kn02xa_mer = (void *)KN02XA_MER;

	volatile u32 *kn02xa_ear = (void *)KN02XA_EAR;

	volatile u32 *kn02xa_mer = (void *)CKSEG1ADDR(KN02XA_MER);

	volatile u32 *kn02xa_ear = (void *)CKSEG1ADDR(KN02XA_EAR);



	static const char excstr[] = "exception";

	static const char intstr[] = "interrupt";
@@ -126,7 +127,7 @@ irqreturn_t dec_kn02xa_be_interrupt(int irq, void *dev_id, 


void __init dec_kn02xa_be_init(void)

{

	volatile u32 *mbcs = (void *)(KN4K_SLOT_BASE + KN4K_MB_CSR);

	volatile u32 *mbcs = (void *)CKSEG1ADDR(KN4K_SLOT_BASE + KN4K_MB_CSR);



        /* For KN04 we need to make sure EE (?) is enabled in the MB.  */

        if (current_cpu_data.cputype == CPU_R4000SC)