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Commit a5decf70 authored by David Daney's avatar David Daney Committed by Ralf Baechle
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MIPS: Octeon: Get rid of a bunch of MSI IRQ number definitions. 



MSI IRQ numbers are allocated dynamically, so there is no reason to
have all these static definitions.

Signed-off-by: default avatarDavid Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1487/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 3508920f

arch/mips/include/asm/mach-cavium-octeon/irq.h

+2 −64
Original line number Diff line number Diff line
@@ -172,71 +172,9 @@ 
#ifdef CONFIG_PCI_MSI

/* 152 - 215 represent the MSI interrupts 0-63 */

#define OCTEON_IRQ_MSI_BIT0	152

#define OCTEON_IRQ_MSI_BIT1	153

#define OCTEON_IRQ_MSI_BIT2	154

#define OCTEON_IRQ_MSI_BIT3	155

#define OCTEON_IRQ_MSI_BIT4	156

#define OCTEON_IRQ_MSI_BIT5	157

#define OCTEON_IRQ_MSI_BIT6	158

#define OCTEON_IRQ_MSI_BIT7	159

#define OCTEON_IRQ_MSI_BIT8	160

#define OCTEON_IRQ_MSI_BIT9	161

#define OCTEON_IRQ_MSI_BIT10	162

#define OCTEON_IRQ_MSI_BIT11	163

#define OCTEON_IRQ_MSI_BIT12	164

#define OCTEON_IRQ_MSI_BIT13	165

#define OCTEON_IRQ_MSI_BIT14	166

#define OCTEON_IRQ_MSI_BIT15	167

#define OCTEON_IRQ_MSI_BIT16	168

#define OCTEON_IRQ_MSI_BIT17	169

#define OCTEON_IRQ_MSI_BIT18	170

#define OCTEON_IRQ_MSI_BIT19	171

#define OCTEON_IRQ_MSI_BIT20	172

#define OCTEON_IRQ_MSI_BIT21	173

#define OCTEON_IRQ_MSI_BIT22	174

#define OCTEON_IRQ_MSI_BIT23	175

#define OCTEON_IRQ_MSI_BIT24	176

#define OCTEON_IRQ_MSI_BIT25	177

#define OCTEON_IRQ_MSI_BIT26	178

#define OCTEON_IRQ_MSI_BIT27	179

#define OCTEON_IRQ_MSI_BIT28	180

#define OCTEON_IRQ_MSI_BIT29	181

#define OCTEON_IRQ_MSI_BIT30	182

#define OCTEON_IRQ_MSI_BIT31	183

#define OCTEON_IRQ_MSI_BIT32	184

#define OCTEON_IRQ_MSI_BIT33	185

#define OCTEON_IRQ_MSI_BIT34	186

#define OCTEON_IRQ_MSI_BIT35	187

#define OCTEON_IRQ_MSI_BIT36	188

#define OCTEON_IRQ_MSI_BIT37	189

#define OCTEON_IRQ_MSI_BIT38	190

#define OCTEON_IRQ_MSI_BIT39	191

#define OCTEON_IRQ_MSI_BIT40	192

#define OCTEON_IRQ_MSI_BIT41	193

#define OCTEON_IRQ_MSI_BIT42	194

#define OCTEON_IRQ_MSI_BIT43	195

#define OCTEON_IRQ_MSI_BIT44	196

#define OCTEON_IRQ_MSI_BIT45	197

#define OCTEON_IRQ_MSI_BIT46	198

#define OCTEON_IRQ_MSI_BIT47	199

#define OCTEON_IRQ_MSI_BIT48	200

#define OCTEON_IRQ_MSI_BIT49	201

#define OCTEON_IRQ_MSI_BIT50	202

#define OCTEON_IRQ_MSI_BIT51	203

#define OCTEON_IRQ_MSI_BIT52	204

#define OCTEON_IRQ_MSI_BIT53	205

#define OCTEON_IRQ_MSI_BIT54	206

#define OCTEON_IRQ_MSI_BIT55	207

#define OCTEON_IRQ_MSI_BIT56	208

#define OCTEON_IRQ_MSI_BIT57	209

#define OCTEON_IRQ_MSI_BIT58	210

#define OCTEON_IRQ_MSI_BIT59	211

#define OCTEON_IRQ_MSI_BIT60	212

#define OCTEON_IRQ_MSI_BIT61	213

#define OCTEON_IRQ_MSI_BIT62	214

#define OCTEON_IRQ_MSI_BIT63	215

#define OCTEON_IRQ_MSI_LAST	(OCTEON_IRQ_MSI_BIT0 + 63)



#define OCTEON_IRQ_LAST         216

#define OCTEON_IRQ_LAST		(OCTEON_IRQ_MSI_LAST + 1)

#else

#define OCTEON_IRQ_LAST         152

#endif

arch/mips/pci/msi-octeon.c

+2 −2
Original line number Diff line number Diff line
@@ -181,7 +181,7 @@ void arch_teardown_msi_irq(unsigned int irq) 
	int number_irqs;

	uint64_t bitmask;



	if ((irq < OCTEON_IRQ_MSI_BIT0) || (irq > OCTEON_IRQ_MSI_BIT63))

	if ((irq < OCTEON_IRQ_MSI_BIT0) || (irq > OCTEON_IRQ_MSI_LAST))

		panic("arch_teardown_msi_irq: Attempted to teardown illegal "

		      "MSI interrupt (%d)", irq);

	irq -= OCTEON_IRQ_MSI_BIT0;
@@ -337,7 +337,7 @@ static int __init octeon_msi_initialize(void) 
{

	int irq;



	for (irq = OCTEON_IRQ_MSI_BIT0; irq <= OCTEON_IRQ_MSI_BIT63; irq++) {

	for (irq = OCTEON_IRQ_MSI_BIT0; irq <= OCTEON_IRQ_MSI_LAST; irq++) {

		set_irq_chip_and_handler(irq, &octeon_irq_chip_msi,

					 handle_percpu_irq);

	}