Loading arch/arm64/boot/dts/qcom/sdm830-pinctrl.dtsi +2 −2 Original line number Diff line number Diff line Loading @@ -11,9 +11,9 @@ */ &soc { tlmm: pinctrl@03800000 { tlmm: pinctrl@03400000 { compatible = "qcom,sdm830-pinctrl"; reg = <0x03800000 0xc00000>; reg = <0x03400000 0xc00000>; interrupts = <0 208 0>; gpio-controller; #gpio-cells = <2>; Loading arch/arm64/boot/dts/qcom/sdm845-pinctrl.dtsi +2 −2 Original line number Diff line number Diff line Loading @@ -11,9 +11,9 @@ */ &soc { tlmm: pinctrl@03800000 { tlmm: pinctrl@03400000 { compatible = "qcom,sdm845-pinctrl"; reg = <0x03800000 0xc00000>; reg = <0x03400000 0xc00000>; interrupts = <0 208 0>; gpio-controller; #gpio-cells = <2>; Loading Loading
arch/arm64/boot/dts/qcom/sdm830-pinctrl.dtsi +2 −2 Original line number Diff line number Diff line Loading @@ -11,9 +11,9 @@ */ &soc { tlmm: pinctrl@03800000 { tlmm: pinctrl@03400000 { compatible = "qcom,sdm830-pinctrl"; reg = <0x03800000 0xc00000>; reg = <0x03400000 0xc00000>; interrupts = <0 208 0>; gpio-controller; #gpio-cells = <2>; Loading
arch/arm64/boot/dts/qcom/sdm845-pinctrl.dtsi +2 −2 Original line number Diff line number Diff line Loading @@ -11,9 +11,9 @@ */ &soc { tlmm: pinctrl@03800000 { tlmm: pinctrl@03400000 { compatible = "qcom,sdm845-pinctrl"; reg = <0x03800000 0xc00000>; reg = <0x03400000 0xc00000>; interrupts = <0 208 0>; gpio-controller; #gpio-cells = <2>; Loading