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Commit a510acd9 authored by Stephen Boyd's avatar Stephen Boyd
Browse files

PM / devfreq: bw_hwmon: Add support for configuring byte MID match 



Add support to configure the byte MID match value from DT.

Change-Id: I5848aef98f15c6de9fe0fae0a1188a17810a5ef5
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
parent d863ed16

Documentation/devicetree/bindings/devfreq/bimc-bwmon.txt

+6 −0
Original line number Diff line number Diff line
@@ -20,6 +20,10 @@ Required properties: 
- qcom,hw-timer-hz:	Hardware sampling rate in Hz. This field must be

			specified for "qcom,bimc-bwmon4"



Optional properties:

- qcom,byte-mid-match:	Byte count MID match value

- qcom,byte-mid-mask:	Byte count MID mask value



Example:

	qcom,cpu-bwmon {

		compatible = "qcom,bimc-bwmon";
@@ -29,4 +33,6 @@ Example: 
		qcom,mport = <0>;

		qcom,target-dev = <&cpubw>;

		qcom,hw-timer-hz = <19200000>;

		qcom,byte-mid-match = <0x1e00>;

		qcom,byte-mid-mask = <0x1e00>;

	};

drivers/devfreq/bimc-bwmon.c

+29 −0
Original line number Diff line number Diff line
@@ -64,6 +64,8 @@ 
#define MON3_INT_STATUS_MASK	0x0F

#define MON3_EN(m)		((m)->base + 0x10)

#define MON3_CLEAR(m)		((m)->base + 0x14)

#define MON3_MASK(m)		((m)->base + 0x18)

#define MON3_MATCH(m)		((m)->base + 0x1C)

#define MON3_SW(m)		((m)->base + 0x20)

#define MON3_THRES_HI(m)	((m)->base + 0x24)

#define MON3_THRES_MED(m)	((m)->base + 0x28)
@@ -102,6 +104,8 @@ struct bwmon { 
	u32 throttle_adj;

	u32 sample_size_ms;

	u32 intr_status;

	u32 byte_mask;

	u32 byte_match;

};



#define to_bwmon(ptr)		container_of(ptr, struct bwmon, hw)
@@ -729,6 +733,25 @@ static irqreturn_t bwmon_intr_thread(int irq, void *dev) 
	return IRQ_HANDLED;

}



static __always_inline

void mon_set_byte_count_filter(struct bwmon *m, enum mon_reg_type type)

{

	if (!m->byte_mask)

		return;



	switch (type) {

	case MON1:

	case MON2:

		writel_relaxed(m->byte_mask, MON_MASK(m));

		writel_relaxed(m->byte_match, MON_MATCH(m));

		break;

	case MON3:

		writel_relaxed(m->byte_mask, MON3_MASK(m));

		writel_relaxed(m->byte_match, MON3_MATCH(m));

		break;

	}

}



static __always_inline int __start_bw_hwmon(struct bw_hwmon *hw,

		unsigned long mbps, enum mon_reg_type type)

{
@@ -781,6 +804,7 @@ static __always_inline int __start_bw_hwmon(struct bw_hwmon *hw, 
		writel_relaxed(zone_actions, MON3_ZONE_ACTIONS(m));

	}



	mon_set_byte_count_filter(m, type);

	mon_irq_clear(m, type);

	mon_irq_enable(m, type);

	mon_enable(m, type);
@@ -1059,6 +1083,11 @@ static int bimc_bwmon_driver_probe(struct platform_device *pdev) 
		break;

	}



	of_property_read_u32(dev->of_node, "qcom,byte-mid-match",

			     &m->byte_match);

	of_property_read_u32(dev->of_node, "qcom,byte-mid-mask",

			     &m->byte_mask);



	if (m->spec->throt_adj) {

		m->hw.set_throttle_adj = mon_set_throttle_adj;

		m->hw.get_throttle_adj = mon_get_throttle_adj;