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Commit a4d8a8b6 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Add device tree support for sdm632 rumi"

parents 94314876 f16c1601

Documentation/devicetree/bindings/arm/msm/msm.txt

+7 −0
Original line number Diff line number Diff line
@@ -110,6 +110,12 @@ SoCs: 
- SDM450

  compatible = "qcom,sdm450"



- SDM632

  compatible = "qcom,sdm632"



- SDA632

  compatible = "qcom,sda632"



- MSM8937

  compatible = "qcom,msm8937"
@@ -321,6 +327,7 @@ compatible = "qcom,msm8953-qrd-sku3" 
compatible = "qcom,sdm450-mtp"

compatible = "qcom,sdm450-cdp"

compatible = "qcom,sdm450-qrd"

compatible = "qcom,sdm632-rumi"

compatible = "qcom,mdm9640-cdp"

compatible = "qcom,mdm9640-mtp"

compatible = "qcom,mdm9640-rumi"

arch/arm64/boot/dts/qcom/Makefile

+3 −0
Original line number Diff line number Diff line
@@ -225,6 +225,9 @@ dtb-$(CONFIG_ARCH_SDM450) += sdm450-rcm.dtb \ 
	sdm450-qrd-sku4.dtb \

	sdm450-pmi632-cdp-s2.dtb \

	sdm450-pmi632-mtp-s3.dtb



dtb-$(CONFIG_ARCH_SDM632) += sdm632-rumi.dtb



endif



always		:= $(dtb-y)

arch/arm64/boot/dts/qcom/msm8953-cpu.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -290,7 +290,7 @@ 
};



&soc {

	cpuss_dump {

	cpuss_dump: cpuss_dump {

		compatible = "qcom,cpuss-dump";

		qcom,l2_dump0 {

			/* L2 cache dump for A53 cluster */

arch/arm64/boot/dts/qcom/msm8953-pinctrl.dtsi

+26 −1
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.

 * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -48,6 +48,31 @@ 
				};

			};



			uart1_console_active: uart1_console_active {

				mux {

					pins = "gpio20", "gpio21";

					function = "blsp_uart6";

				};



				config {

					pins = "gpio20", "gpio21";

					drive-strength = <2>;

					bias-disable;

				};

			};



			uart1_console_sleep: uart1_console_sleep {

				mux {

					pins = "gpio20", "gpio21";

					function = "blsp_uart6";

				};



				config {

					pins = "gpio20", "gpio21";

					drive-strength = <2>;

					bias-pull-down;

				};

			};

		};

		cci {

			cci0_active: cci0_active {

arch/arm64/boot/dts/qcom/msm8953.dtsi

+11 −1
Original line number Diff line number Diff line
@@ -507,6 +507,16 @@ 
		status = "disabled";

	};



	blsp1_serial1: serial@78b0000 {

		compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";

		reg = <0x78b0000 0x200>;

		interrupts = <0 108 0>;

		clocks = <&clock_gcc clk_gcc_blsp1_uart2_apps_clk>,

			<&clock_gcc clk_gcc_blsp1_ahb_clk>;

		clock-names = "core", "iface";

		status = "disabled";

	};



	dma_blsp1: qcom,sps-dma@7884000 { /* BLSP1 */

		#dma-cells = <4>;

		compatible = "qcom,sps-dma";
@@ -1070,7 +1080,7 @@ 
		rpm-channel-type = <15>; /* SMD_APPS_RPM */

		};



	qcom,wdt@b017000 {

	wdog: qcom,wdt@b017000 {

		compatible = "qcom,msm-watchdog";

		reg = <0xb017000 0x1000>;

		reg-names = "wdt-base";