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Commit a3ebdb6c authored by Christoph Lameter's avatar Christoph Lameter Committed by Tony Luck
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IA64: Slim down __clear_bit_unlock



__clear_bit_unlock does not need to perform atomic operations on the
variable.  Avoid a cmpxchg and simply do a store with release semantics.
Add a barrier to be safe that the compiler does not do funky things.

Tony: Use intrinsic rather than inline assembler

Signed-off-by: default avatarChristoph Lameter <clameter@sgi.com>
Acked-by: default avatarNick Piggin <nickpiggin@yahoo.com.au>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
parent c63a1190
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+14 −3
Original line number Diff line number Diff line
@@ -124,10 +124,21 @@ clear_bit_unlock (int nr, volatile void *addr)
/**
 * __clear_bit_unlock - Non-atomically clear a bit with release
 *
 * This is like clear_bit_unlock, but the implementation may use a non-atomic
 * store (this one uses an atomic, however).
 * This is like clear_bit_unlock, but the implementation uses a store
 * with release semantics. See also __raw_spin_unlock().
 */
#define __clear_bit_unlock clear_bit_unlock
static __inline__ void
__clear_bit_unlock(int nr, volatile void *addr)
{
	__u32 mask, new;
	volatile __u32 *m;

	m = (volatile __u32 *)addr + (nr >> 5);
	mask = ~(1 << (nr & 31));
	new = *m & mask;
	barrier();
	ia64_st4_rel_nta(m, new);
}

/**
 * __clear_bit - Clears a bit in memory (non-atomic version)
+5 −0
Original line number Diff line number Diff line
@@ -191,6 +191,11 @@ register unsigned long ia64_r13 asm ("r13") __attribute_used__;
	asm volatile ("ldf.fill %0=[%1]" :"=f"(__f__): "r"(x));	\
})

#define ia64_st4_rel_nta(m, val)					\
({									\
	asm volatile ("st4.rel.nta [%0] = %1\n\t" :: "r"(m), "r"(val));	\
})

#define ia64_stfs(x, regnum)						\
({									\
	register double __f__ asm ("f"#regnum);				\
+3 −0
Original line number Diff line number Diff line
@@ -110,6 +110,9 @@
#define ia64_st4_rel		__st4_rel
#define ia64_st8_rel		__st8_rel

/* FIXME: need st4.rel.nta intrinsic */
#define ia64_st4_rel_nta	__st4_rel

#define ia64_ld1_acq		__ld1_acq
#define ia64_ld2_acq		__ld2_acq
#define ia64_ld4_acq		__ld4_acq