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Commit a3d22a55 authored by Boris Brezillon's avatar Boris Brezillon Committed by Brian Norris
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mtd: nand: sunxi: rely on nand_dt_init initialization 



nand_dt_init(), called from nand_scan_ident(), is already parsing the
generic MTD/NAND DT properties, and initializing the nand_chip struct
accordingly.
Rely on this initialization instead of manually parsing those properties.

Signed-off-by: default avatarBoris Brezillon <boris.brezillon@free-electrons.com>
[Brian: rename 'np' -> 'flash_node' to accomodate for prior rename patch]
Signed-off-by: default avatarBrian Norris <computersforpeace@gmail.com>
parent 61528d88

drivers/mtd/nand/sunxi_nand.c

+10 −17
Original line number Diff line number Diff line
@@ -1168,16 +1168,9 @@ static int sunxi_nand_ecc_init(struct mtd_info *mtd, struct nand_ecc_ctrl *ecc, 
			       struct device_node *np)

{

	struct nand_chip *nand = mtd->priv;

	int strength;

	int blk_size;

	int ret;



	blk_size = of_get_nand_ecc_step_size(np);

	strength = of_get_nand_ecc_strength(np);

	if (blk_size > 0 && strength > 0) {

		ecc->size = blk_size;

		ecc->strength = strength;

	} else {

	if (!ecc->size) {

		ecc->size = nand->ecc_step_ds;

		ecc->strength = nand->ecc_strength_ds;

	}
@@ -1185,12 +1178,6 @@ static int sunxi_nand_ecc_init(struct mtd_info *mtd, struct nand_ecc_ctrl *ecc, 
	if (!ecc->size || !ecc->strength)

		return -EINVAL;



	ecc->mode = NAND_ECC_HW;



	ret = of_get_nand_ecc_mode(np);

	if (ret >= 0)

		ecc->mode = ret;



	switch (ecc->mode) {

	case NAND_ECC_SOFT_BCH:

		break;
@@ -1316,15 +1303,18 @@ static int sunxi_nand_chip_init(struct device *dev, struct sunxi_nfc *nfc, 
	/* Default tR value specified in the ONFI spec (chapter 4.15.1) */

	nand->chip_delay = 200;

	nand->controller = &nfc->controller;

	/*

	 * Set the ECC mode to the default value in case nothing is specified

	 * in the DT.

	 */

	nand->ecc.mode = NAND_ECC_HW;

	nand->flash_node = np;

	nand->select_chip = sunxi_nfc_select_chip;

	nand->cmd_ctrl = sunxi_nfc_cmd_ctrl;

	nand->read_buf = sunxi_nfc_read_buf;

	nand->write_buf = sunxi_nfc_write_buf;

	nand->read_byte = sunxi_nfc_read_byte;



	if (of_get_nand_on_flash_bbt(np))

		nand->bbt_options |= NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB;



	mtd = &chip->mtd;

	mtd->dev.parent = dev;

	mtd->priv = nand;
@@ -1334,6 +1324,9 @@ static int sunxi_nand_chip_init(struct device *dev, struct sunxi_nfc *nfc, 
	if (ret)

		return ret;



	if (nand->bbt_options & NAND_BBT_USE_FLASH)

		nand->bbt_options |= NAND_BBT_NO_OOB;



	ret = sunxi_nand_chip_init_timings(chip, np);

	if (ret) {

		dev_err(dev, "could not configure chip timings: %d\n", ret);