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Commit a38180bd authored by Suravee Suthikulpanit's avatar Suravee Suthikulpanit Committed by Joerg Roedel
Browse files

iommu/amd: Move and introduce new IRTE-related unions and structures 



Move existing unions and structs for accessing/managing IRTE to a proper
header file. This is mainly to simplify variable declarations in subsequent
patches.

Besides, this patch also introduces new struct irte_ga for the new
128-bit IRTE format.

Signed-off-by: default avatarSuravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: default avatarJoerg Roedel <jroedel@suse.de>
parent 3928aa3f

drivers/iommu/amd_iommu.c

+0 −28
Original line number Diff line number Diff line
@@ -3511,34 +3511,6 @@ EXPORT_SYMBOL(amd_iommu_device_info); 
 *

 *****************************************************************************/



union irte {

	u32 val;

	struct {

		u32 valid	: 1,

		    no_fault	: 1,

		    int_type	: 3,

		    rq_eoi	: 1,

		    dm		: 1,

		    rsvd_1	: 1,

		    destination	: 8,

		    vector	: 8,

		    rsvd_2	: 8;

	} fields;

};



struct irq_2_irte {

	u16 devid; /* Device ID for IRTE table */

	u16 index; /* Index into IRTE table*/

};



struct amd_ir_data {

	struct irq_2_irte			irq_2_irte;

	union irte				irte_entry;

	union {

		struct msi_msg			msi_entry;

	};

};



static struct irq_chip amd_ir_chip;



#define DTE_IRQ_PHYS_ADDR_MASK	(((1ULL << 45)-1) << 6)

drivers/iommu/amd_iommu_types.h

+76 −0
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@ 


#include <linux/types.h>

#include <linux/mutex.h>

#include <linux/msi.h>

#include <linux/list.h>

#include <linux/spinlock.h>

#include <linux/pci.h>
@@ -705,4 +706,79 @@ enum amd_iommu_intr_mode_type { 
					 x == AMD_IOMMU_GUEST_IR_LEGACY_GA)



#define AMD_IOMMU_GUEST_IR_VAPIC(x)	(x == AMD_IOMMU_GUEST_IR_VAPIC)



union irte {

	u32 val;

	struct {

		u32 valid	: 1,

		    no_fault	: 1,

		    int_type	: 3,

		    rq_eoi	: 1,

		    dm		: 1,

		    rsvd_1	: 1,

		    destination	: 8,

		    vector	: 8,

		    rsvd_2	: 8;

	} fields;

};



union irte_ga_lo {

	u64 val;



	/* For int remapping */

	struct {

		u64 valid	: 1,

		    no_fault	: 1,

		    /* ------ */

		    int_type	: 3,

		    rq_eoi	: 1,

		    dm		: 1,

		    /* ------ */

		    guest_mode	: 1,

		    destination	: 8,

		    rsvd	: 48;

	} fields_remap;



	/* For guest vAPIC */

	struct {

		u64 valid	: 1,

		    no_fault	: 1,

		    /* ------ */

		    ga_log_intr	: 1,

		    rsvd1	: 3,

		    is_run	: 1,

		    /* ------ */

		    guest_mode	: 1,

		    destination	: 8,

		    rsvd2	: 16,

		    ga_tag	: 32;

	} fields_vapic;

};



union irte_ga_hi {

	u64 val;

	struct {

		u64 vector	: 8,

		    rsvd_1	: 4,

		    ga_root_ptr	: 40,

		    rsvd_2	: 12;

	} fields;

};



struct irte_ga {

	union irte_ga_lo lo;

	union irte_ga_hi hi;

};



struct irq_2_irte {

	u16 devid; /* Device ID for IRTE table */

	u16 index; /* Index into IRTE table*/

};



struct amd_ir_data {

	struct irq_2_irte irq_2_irte;

	union irte irte_entry;

	struct msi_msg msi_entry;

};



#endif /* _ASM_X86_AMD_IOMMU_TYPES_H */