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Commit a31f7f5f authored by Justin P. Mattock's avatar Justin P. Mattock Committed by Greg Kroah-Hartman
Browse files

staging: "winbond" Fix typos. 



 Signed-off-by: default avatarJustin P. Mattock <justinmattock@gmail.com>

Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 21aac2c9

drivers/staging/winbond/localpara.h

+2 −2
Original line number Diff line number Diff line
@@ -137,7 +137,7 @@ struct wb_local_para { 
	u8	iPowerSaveMode; /* 0 indicates on, 1 indicates off */

	u8	ATIMmode;

	u8	ExcludeUnencrypted;

	/* Unit ime count for the decision to enter PS mode */

	/* Unit time count for the decision to enter PS mode */

	u16	CheckCountForPS;

	u8	boHasTxActivity;/* tx activity has occurred */

	u8	boMacPsValid;	/* Power save mode obtained from H/W is valid or not */
@@ -187,7 +187,7 @@ struct wb_local_para { 
	u8	reserved7[3];



	struct	chan_info CurrentChan;	/* Current channel no. and channel band. It may be changed by scanning. */

	u8	boHandover;		/* Roaming, Hnadover to other AP. */

	u8	boHandover;		/* Roaming, Handover to other AP. */

	u8	boCCAbusy;



	u16	CWMax;			/* It may not be the real value that H/W used */

drivers/staging/winbond/mds.c

+1 −1
Original line number Diff line number Diff line
@@ -569,7 +569,7 @@ Mds_SendComplete(struct wbsoft_priv *adapter, struct T02_descriptor *pT02) 
	unsigned char	SendOK = true;

	u8	RetryCount, TxRate;



	if (pT02->T02_IgnoreResult) /* Don't care the result */

	if (pT02->T02_IgnoreResult) /* Don't care about the result */

		return;

	if (pT02->T02_IsLastMpdu) {

		/* TODO: DTO -- get the retry count and fragment count */

drivers/staging/winbond/mto.c

+1 −1
Original line number Diff line number Diff line
@@ -23,7 +23,7 @@ 
#include "core.h"



/* Declare SQ3 to rate and fragmentation threshold table */

/* Declare fragmentation thresholds table */

/* Declare fragmentation threshold table */

#define MTO_MAX_FRAG_TH_LEVELS		5

#define MTO_MAX_DATA_RATE_LEVELS	12

drivers/staging/winbond/phy_calibration.c

+7 −7
Original line number Diff line number Diff line
@@ -399,7 +399,7 @@ void _rxadc_dc_offset_cancellation_winbond(struct hw_data *phw_data, u32 frequen 
	val |= MASK_ADC_DC_CAL_STR;

	hw_set_dxx_reg(phw_data, REG_MODE_CTRL, val);



	/* e. The result are shown in "adc_dc_cal_i[8:0] and adc_dc_cal_q[8:0]" */

	/* e. The results are shown in "adc_dc_cal_i[8:0] and adc_dc_cal_q[8:0]" */

#ifdef _DEBUG

	hw_get_dxx_reg(phw_data, REG_OFFSET_READ, &val);

	PHY_DEBUG(("[CAL]    REG_OFFSET_READ = 0x%08X\n", val));
@@ -720,7 +720,7 @@ u8 _tx_iq_calibration_loop_winbond(struct hw_data *phw_data, 
		for (capture_time = 0; capture_time < 10; capture_time++) {

			/*

			 * a. Set iqcal_mode[1:0] to 0x2 and set "calib_start" to 0x1 to

			 *    enable "IQ alibration Mode II"

			 *    enable "IQ calibration Mode II"

			 */

			reg_mode_ctrl &= ~(MASK_IQCAL_TONE_SEL|MASK_IQCAL_MODE);

			reg_mode_ctrl &= ~MASK_IQCAL_MODE;
@@ -750,7 +750,7 @@ u8 _tx_iq_calibration_loop_winbond(struct hw_data *phw_data, 


			/*

			 * d. Set iqcal_mode[1:0] to 0x3 and set "calib_start" to 0x1 to

			 *    enable "IQ alibration Mode II"

			 *    enable "IQ calibration Mode II"

			 */

			/* hw_get_dxx_reg(phw_data, REG_MODE_CTRL, &val); */

			hw_get_dxx_reg(phw_data, REG_MODE_CTRL, &reg_mode_ctrl);
@@ -980,7 +980,7 @@ void _tx_iq_calibration_winbond(struct hw_data *phw_data) 
	phy_set_rf_data(phw_data, 0, (0<<24)|0xFDF1C0);

	/* ; [BB-chip]: Calibration (6f).Send test pattern */

	/* ; [BB-chip]: Calibration (6g). Search RXGCL optimal value */

	/* ; [BB-chip]: Calibration (6h). Caculate TX-path IQ imbalance and setting TX path IQ compensation table */

	/* ; [BB-chip]: Calibration (6h). Calculate TX-path IQ imbalance and setting TX path IQ compensation table */

	/* phy_set_rf_data(phw_data, 3, (3<<24)|0x025586); */



	msleep(30); /* 20060612.1.a 30ms delay. Add the follow 2 lines */
@@ -1373,7 +1373,7 @@ u8 _rx_iq_calibration_loop_winbond(struct hw_data *phw_data, u16 factor, u32 fre 
/***************************************************************/

void _rx_iq_calibration_winbond(struct hw_data *phw_data, u32 frequency)

{

/* figo 20050523 marked this flag for can't compile for relesase */

/* figo 20050523 marked this flag for can't compile for release */

#ifdef _DEBUG

	s32     rx_cal_reg[4];

	u32     val;
@@ -1397,7 +1397,7 @@ void _rx_iq_calibration_winbond(struct hw_data *phw_data, u32 frequency) 


	/*  ; [BB-chip]: Calibration (7f). Send test pattern */

	/*	; [BB-chip]: Calibration (7g). Search RXGCL optimal value */

	/*	; [BB-chip]: Calibration (7h). Caculate RX-path IQ imbalance and setting RX path IQ compensation table */

	/*	; [BB-chip]: Calibration (7h). Calculate RX-path IQ imbalance and setting RX path IQ compensation table */



	result = _rx_iq_calibration_loop_winbond(phw_data, 12589, frequency);
@@ -1454,7 +1454,7 @@ void phy_calibration_winbond(struct hw_data *phw_data, u32 frequency) 


	_rxadc_dc_offset_cancellation_winbond(phw_data, frequency);

	/* _txidac_dc_offset_cancellation_winbond(phw_data); */

	/* _txqdac_dc_offset_cacellation_winbond(phw_data); */

	/* _txqdac_dc_offset_cancellation_winbond(phw_data); */



	_tx_iq_calibration_winbond(phw_data);

	_rx_iq_calibration_winbond(phw_data, frequency);

drivers/staging/winbond/reg.c

+1 −1
Original line number Diff line number Diff line
@@ -693,7 +693,7 @@ u32 w89rf242_rf_data[] = { 
	(0x0E << 24) | 0x5557DC, /* 1555F ; IBSC  (0x0E) -- IRLNA & IRLNB (PTAT & Const current)=01/01; FA5976B_1.3F */

	(0x10 << 24) | 0x000C20, /* 00030 ; TMODA (0x10) -- LNA_gain_step=0011 ; LNA=15/16dB */

	(0x11 << 24) | 0x0C0022, /* 03000 ; TMODB (0x11) -- Turn ON RX-Q path Test Switch; To improve IQ path group delay (FA5976A_1.3C) */

	(0x12 << 24) | 0x000024  /* TMODC (0x12) -- Turn OFF Tempearure sensor */

	(0x12 << 24) | 0x000024  /* TMODC (0x12) -- Turn OFF Temperature sensor */

};



u32 w89rf242_channel_data_24[][2] = {