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Commit a2de55d5 authored by Sahitya Tummala's avatar Sahitya Tummala
Browse files

mtd: msm_qpic_nand: QPIC clock changes when it is RPMH controlled 



Add new dtsi property qcom,qpic-clk-rpmh to indicate whether
QPIC clock is RPMH controlled clock or not. If it is, then
driver should not fail in case the clock is not found.
In case of RPMH clock, the QPIC clock gets enabled as part
of bus voting.

Change-Id: I07afa382f663a4f43b2bc35dfa42c084812afbc1
Signed-off-by: default avatarSahitya Tummala <stummala@codeaurora.org>
parent 4f4d1064

Documentation/devicetree/bindings/mtd/msm_qpic_nand.txt

+3 −0
Original line number Diff line number Diff line
@@ -9,6 +9,8 @@ Required properties: 
  defined.

- qcom,reg-adjustment-offset : Specify the base adjustment offset value for the

  version registers

- qcom,qpic-clk-rpmh: Indicates whether QPIC clock is RPMH controlled clock or

  not.



MTD flash partition layout for NAND devices -
@@ -53,6 +55,7 @@ Examples: 
		qcom,msm-bus,num-cases = <1>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps = <91 512 0 0>,

		qcom,qpic-clk-rpmh;

	};



       qcom,mtd-partitions {

drivers/mtd/devices/msm_qpic_nand.c

+30 −19
Original line number Diff line number Diff line
@@ -130,10 +130,12 @@ static int msm_nand_setup_clocks_and_bus_bw(struct msm_nand_info *info, 
{

	int ret = 0;



	if (!info->clk_data.rpmh_clk) {

		if (IS_ERR_OR_NULL(info->clk_data.qpic_clk)) {

			ret = -EINVAL;

			goto out;

		}

	}

	if (atomic_read(&info->clk_data.clk_enabled) == vote)

		goto out;

	if (!atomic_read(&info->clk_data.clk_enabled) && vote) {
@@ -142,6 +144,7 @@ static int msm_nand_setup_clocks_and_bus_bw(struct msm_nand_info *info, 
			pr_err("Failed to vote for bus with %d\n", ret);

			goto out;

		}

		if (!info->clk_data.rpmh_clk) {

			ret = clk_prepare_enable(info->clk_data.qpic_clk);

			if (ret) {

				pr_err("Failed to enable the bus-clock with error %d\n",
@@ -149,7 +152,9 @@ static int msm_nand_setup_clocks_and_bus_bw(struct msm_nand_info *info, 
				msm_nand_bus_set_vote(info, 0);

				goto out;

			}

		}

	} else if (atomic_read(&info->clk_data.clk_enabled) && !vote) {

		if (!info->clk_data.rpmh_clk)

			clk_disable_unprepare(info->clk_data.qpic_clk);

		msm_nand_bus_set_vote(info, 0);

	}
@@ -3468,6 +3473,11 @@ static int msm_nand_probe(struct platform_device *pdev) 
	err = msm_nand_bus_register(pdev, info);

	if (err)

		goto out;



	if (of_property_read_bool(pdev->dev.of_node, "qcom,qpic-clk-rpmh"))

		info->clk_data.rpmh_clk = true;



	if (!info->clk_data.rpmh_clk) {

		info->clk_data.qpic_clk = devm_clk_get(&pdev->dev, "core_clk");

		if (!IS_ERR_OR_NULL(info->clk_data.qpic_clk)) {

			err = clk_set_rate(info->clk_data.qpic_clk,
@@ -3478,6 +3488,7 @@ static int msm_nand_probe(struct platform_device *pdev) 
		}

		if (err)

			goto bus_unregister;

	}



	err = msm_nand_setup_clocks_and_bus_bw(info, true);

	if (err)

drivers/mtd/devices/msm_qpic_nand.h

+1 −0
Original line number Diff line number Diff line
@@ -295,6 +295,7 @@ struct msm_nand_clk_data { 
	uint32_t client_handle;

	atomic_t clk_enabled;

	atomic_t curr_vote;

	bool rpmh_clk;

};



/* Structure that defines NANDc private data. */