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Commit a2c01ed5 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'powerpc-4.3-5' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux 

Pull powerpc fixes from Michael Ellerman:

 - Revert "Use the POWER8 Micro Partition Prefetch Engine in KVM HV on
   POWER8" from Paul
 - Handle irq_happened flag correctly in off-line loop from Paul
 - Validate rtas.entry before calling enter_rtas() from Vasant

* tag 'powerpc-4.3-5' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
  powerpc/rtas: Validate rtas.entry before calling enter_rtas()
  powerpc/powernv: Handle irq_happened flag correctly in off-line loop
  powerpc: Revert "Use the POWER8 Micro Partition Prefetch Engine in KVM HV on POWER8"
parents d0ddf980 8832317f

arch/powerpc/include/asm/cache.h

+0 −7
Original line number Diff line number Diff line
@@ -3,7 +3,6 @@ 


#ifdef __KERNEL__



#include <asm/reg.h>



/* bytes per L1 cache line */

#if defined(CONFIG_8xx) || defined(CONFIG_403GCX)
@@ -40,12 +39,6 @@ struct ppc64_caches { 
};



extern struct ppc64_caches ppc64_caches;



static inline void logmpp(u64 x)

{

	asm volatile(PPC_LOGMPP(R1) : : "r" (x));

}



#endif /* __powerpc64__ && ! __ASSEMBLY__ */



#if defined(__ASSEMBLY__)

arch/powerpc/include/asm/kvm_host.h

+0 −2
Original line number Diff line number Diff line
@@ -297,8 +297,6 @@ struct kvmppc_vcore { 
	u32 arch_compat;

	ulong pcr;

	ulong dpdes;		/* doorbell state (POWER8) */

	void *mpp_buffer; /* Micro Partition Prefetch buffer */

	bool mpp_buffer_is_valid;

	ulong conferring_threads;

};

arch/powerpc/include/asm/ppc-opcode.h

+0 −17
Original line number Diff line number Diff line
@@ -141,7 +141,6 @@ 
#define PPC_INST_ISEL			0x7c00001e

#define PPC_INST_ISEL_MASK		0xfc00003e

#define PPC_INST_LDARX			0x7c0000a8

#define PPC_INST_LOGMPP			0x7c0007e4

#define PPC_INST_LSWI			0x7c0004aa

#define PPC_INST_LSWX			0x7c00042a

#define PPC_INST_LWARX			0x7c000028
@@ -285,20 +284,6 @@ 
#define __PPC_EH(eh)	0

#endif



/* POWER8 Micro Partition Prefetch (MPP) parameters */

/* Address mask is common for LOGMPP instruction and MPPR SPR */

#define PPC_MPPE_ADDRESS_MASK 0xffffffffc000ULL



/* Bits 60 and 61 of MPP SPR should be set to one of the following */

/* Aborting the fetch is indeed setting 00 in the table size bits */

#define PPC_MPPR_FETCH_ABORT (0x0ULL << 60)

#define PPC_MPPR_FETCH_WHOLE_TABLE (0x2ULL << 60)



/* Bits 54 and 55 of register for LOGMPP instruction should be set to: */

#define PPC_LOGMPP_LOG_L2 (0x02ULL << 54)

#define PPC_LOGMPP_LOG_L2L3 (0x01ULL << 54)

#define PPC_LOGMPP_LOG_ABORT (0x03ULL << 54)



/* Deal with instructions that older assemblers aren't aware of */

#define	PPC_DCBAL(a, b)		stringify_in_c(.long PPC_INST_DCBAL | \

					__PPC_RA(a) | __PPC_RB(b))
@@ -307,8 +292,6 @@ 
#define PPC_LDARX(t, a, b, eh)	stringify_in_c(.long PPC_INST_LDARX | \

					___PPC_RT(t) | ___PPC_RA(a) | \

					___PPC_RB(b) | __PPC_EH(eh))

#define PPC_LOGMPP(b)		stringify_in_c(.long PPC_INST_LOGMPP | \

					__PPC_RB(b))

#define PPC_LWARX(t, a, b, eh)	stringify_in_c(.long PPC_INST_LWARX | \

					___PPC_RT(t) | ___PPC_RA(a) | \

					___PPC_RB(b) | __PPC_EH(eh))

arch/powerpc/include/asm/reg.h

+0 −1
Original line number Diff line number Diff line
@@ -226,7 +226,6 @@ 
#define   CTRL_TE	0x00c00000	/* thread enable */

#define   CTRL_RUNLATCH	0x1

#define SPRN_DAWR	0xB4

#define SPRN_MPPR	0xB8	/* Micro Partition Prefetch Register */

#define SPRN_RPR	0xBA	/* Relative Priority Register */

#define SPRN_CIABR	0xBB

#define   CIABR_PRIV		0x3

arch/powerpc/kernel/rtas.c

+3 −0
Original line number Diff line number Diff line
@@ -1043,6 +1043,9 @@ asmlinkage int ppc_rtas(struct rtas_args __user *uargs) 
	if (!capable(CAP_SYS_ADMIN))

		return -EPERM;



	if (!rtas.entry)

		return -EINVAL;



	if (copy_from_user(&args, uargs, 3 * sizeof(u32)) != 0)

		return -EFAULT;