Loading drivers/gpu/drm/msm/sde/sde_color_processing.c +1 −1 Original line number Diff line number Diff line Loading @@ -180,7 +180,7 @@ static int sde_cp_disable_crtc_blob_property(struct sde_cp_node *prop_node) struct drm_property_blob *blob = prop_node->blob_ptr; if (!blob) return -EINVAL; return 0; drm_property_unreference_blob(blob); prop_node->blob_ptr = NULL; return 0; Loading drivers/gpu/drm/msm/sde/sde_hw_color_proc_common_v4.h +1 −0 Original line number Diff line number Diff line Loading @@ -21,6 +21,7 @@ #define GAMUT_MAP_EN BIT(1) #define GAMUT_EN BIT(0) #define GAMUT_MODE_13B_OFF 640 #define GAMUT_MODE_5_OFF 1248 enum { gamut_mode_17 = 0, Loading drivers/gpu/drm/msm/sde/sde_hw_reg_dma_v1_color_proc.c +2 −4 Original line number Diff line number Diff line Loading @@ -347,10 +347,9 @@ static int sde_gamut_get_mode_info(struct drm_msm_3d_gamut *payload, break; case GAMUT_3D_MODE_5: *tbl_len = GAMUT_3D_MODE5_TBL_SZ * sizeof(u32) * 2; *tbl_off = 0; *tbl_off = GAMUT_MODE_5_OFF; *scale_off = GAMUT_SCALEB_OFFSET_OFF; *opcode = gamut_mode_5 << 2; *opcode |= GAMUT_MAP_EN; break; case GAMUT_3D_MODE_13: *tbl_len = GAMUT_3D_MODE13_TBL_SZ * sizeof(u32) * 2; Loading @@ -364,7 +363,6 @@ static int sde_gamut_get_mode_info(struct drm_msm_3d_gamut *payload, *scale_off = (*opcode == gamut_mode_13a) ? GAMUT_SCALEA_OFFSET_OFF : GAMUT_SCALEB_OFFSET_OFF; *opcode <<= 2; *opcode |= GAMUT_MAP_EN; break; default: rc = -EINVAL; Loading Loading @@ -475,7 +473,7 @@ void reg_dmav1_setup_dspp_3d_gamutv4(struct sde_hw_dspp *ctx, void *cfg) } REG_DMA_SETUP_OPS(dma_write_cfg, ctx->cap->sblk->gamut.base + GAMUT_LOWER_COLOR_OFF, &payload->col[i][0].c0, tbl_len, &payload->col[i][0].c2_c1, tbl_len, REG_BLK_WRITE_MULTIPLE, 2, 0); rc = dma_ops->setup_payload(&dma_write_cfg); if (rc) { Loading include/uapi/drm/msm_drm_pp.h +1 −1 Original line number Diff line number Diff line Loading @@ -96,8 +96,8 @@ struct drm_msm_memcol { * @c2_c1: Holds c2/c1 values */ struct drm_msm_3d_col { __u32 c0; __u32 c2_c1; __u32 c0; }; /** * struct drm_msm_3d_gamut - 3d gamut feature structure Loading Loading
drivers/gpu/drm/msm/sde/sde_color_processing.c +1 −1 Original line number Diff line number Diff line Loading @@ -180,7 +180,7 @@ static int sde_cp_disable_crtc_blob_property(struct sde_cp_node *prop_node) struct drm_property_blob *blob = prop_node->blob_ptr; if (!blob) return -EINVAL; return 0; drm_property_unreference_blob(blob); prop_node->blob_ptr = NULL; return 0; Loading
drivers/gpu/drm/msm/sde/sde_hw_color_proc_common_v4.h +1 −0 Original line number Diff line number Diff line Loading @@ -21,6 +21,7 @@ #define GAMUT_MAP_EN BIT(1) #define GAMUT_EN BIT(0) #define GAMUT_MODE_13B_OFF 640 #define GAMUT_MODE_5_OFF 1248 enum { gamut_mode_17 = 0, Loading
drivers/gpu/drm/msm/sde/sde_hw_reg_dma_v1_color_proc.c +2 −4 Original line number Diff line number Diff line Loading @@ -347,10 +347,9 @@ static int sde_gamut_get_mode_info(struct drm_msm_3d_gamut *payload, break; case GAMUT_3D_MODE_5: *tbl_len = GAMUT_3D_MODE5_TBL_SZ * sizeof(u32) * 2; *tbl_off = 0; *tbl_off = GAMUT_MODE_5_OFF; *scale_off = GAMUT_SCALEB_OFFSET_OFF; *opcode = gamut_mode_5 << 2; *opcode |= GAMUT_MAP_EN; break; case GAMUT_3D_MODE_13: *tbl_len = GAMUT_3D_MODE13_TBL_SZ * sizeof(u32) * 2; Loading @@ -364,7 +363,6 @@ static int sde_gamut_get_mode_info(struct drm_msm_3d_gamut *payload, *scale_off = (*opcode == gamut_mode_13a) ? GAMUT_SCALEA_OFFSET_OFF : GAMUT_SCALEB_OFFSET_OFF; *opcode <<= 2; *opcode |= GAMUT_MAP_EN; break; default: rc = -EINVAL; Loading Loading @@ -475,7 +473,7 @@ void reg_dmav1_setup_dspp_3d_gamutv4(struct sde_hw_dspp *ctx, void *cfg) } REG_DMA_SETUP_OPS(dma_write_cfg, ctx->cap->sblk->gamut.base + GAMUT_LOWER_COLOR_OFF, &payload->col[i][0].c0, tbl_len, &payload->col[i][0].c2_c1, tbl_len, REG_BLK_WRITE_MULTIPLE, 2, 0); rc = dma_ops->setup_payload(&dma_write_cfg); if (rc) { Loading
include/uapi/drm/msm_drm_pp.h +1 −1 Original line number Diff line number Diff line Loading @@ -96,8 +96,8 @@ struct drm_msm_memcol { * @c2_c1: Holds c2/c1 values */ struct drm_msm_3d_col { __u32 c0; __u32 c2_c1; __u32 c0; }; /** * struct drm_msm_3d_gamut - 3d gamut feature structure Loading