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Commit a209ac35 authored by Anirudh Ghayal's avatar Anirudh Ghayal Committed by Gerrit - the friendly Code Review server
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power: qpnp-fg-gen3: Disable FG during TWM entry 



To save power disable FG during TWM entry. Identify
TWM entry via the TWM notifier and disable FG in the
shutdown callback if TWM entry is requested.

Add a DT property "qcom,fg-disable-in-twm" to enable
this feature.

Change-Id: I6eaea1838d3ad9161fd0529c79dd528f5d4bcbe0
Signed-off-by: default avatarAnirudh Ghayal <aghayal@codeaurora.org>
parent 60331d50

Documentation/devicetree/bindings/power/supply/qcom/qpnp-fg-gen3.txt

+5 −0
Original line number Diff line number Diff line
@@ -483,6 +483,11 @@ First Level Node - FG Gen3 device 
	Value type: <u32>

	Definition: The minimum battery current for FG to enter into sync-sleep.



- qcom,fg-disable-in-twm

	Usage:      optional

	Value type: <empty>

	Definition: A boolean property which disables FG during TWM entry.



==========================================================

Second Level Nodes - Peripherals managed by FG Gen3 driver

==========================================================

drivers/power/supply/qcom/fg-core.h

+3 −0
Original line number Diff line number Diff line
@@ -284,6 +284,7 @@ struct fg_dt_props { 
	bool	auto_recharge_soc;

	bool	use_esr_sw;

	bool	disable_esr_pull_dn;

	bool	disable_fg_twm;

	int	cutoff_volt_mv;

	int	empty_volt_mv;

	int	vbatt_low_thr_mv;
@@ -452,6 +453,7 @@ struct fg_chip { 
	struct fg_batt_props	bp;

	struct fg_cyc_ctr_data	cyc_ctr;

	struct notifier_block	nb;

	struct notifier_block	twm_nb;

	struct fg_cap_learning  cl;

	struct alarm            esr_sw_timer;

	struct ttf		ttf;
@@ -500,6 +502,7 @@ struct fg_chip { 
	bool			slope_limit_en;

	bool			use_ima_single_mode;

	bool			usb_present;

	bool			twm_state;

	bool			use_dma;

	bool			qnovo_enable;

	bool			suspended;

drivers/power/supply/qcom/fg-reg.h

+7 −1
Original line number Diff line number Diff line 
/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.

/* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -29,6 +29,7 @@ 
#define BATT_SOC_STS_CLR(chip)			(chip->batt_soc_base + 0x4A)

#define BATT_SOC_LOW_PWR_CFG(chip)		(chip->batt_soc_base + 0x52)

#define BATT_SOC_LOW_PWR_STS(chip)		(chip->batt_soc_base + 0x56)

#define BATT_SOC_RST_CTRL0(chip)		(chip->batt_soc_base + 0xBA)



/* BATT_SOC_INT_RT_STS */

#define SOC_READY_BIT				BIT(1)
@@ -40,6 +41,11 @@ 
/* BATT_SOC_RESTART */

#define RESTART_GO_BIT				BIT(0)



/* BATT_SOC_RST_CTRL0 */

#define BCL_RST_BIT				BIT(2)

#define MEM_RST_BIT				BIT(1)

#define ALG_RST_BIT				BIT(0)



/* FG_BATT_INFO register definitions */

#define BATT_INFO_BATT_TEMP_STS(chip)		(chip->batt_info_base + 0x06)

#define BATT_INFO_SYS_BATT(chip)		(chip->batt_info_base + 0x07)

drivers/power/supply/qcom/fg-util.c

+1 −1
Original line number Diff line number Diff line
@@ -471,7 +471,7 @@ int fg_masked_write(struct fg_chip *chip, int addr, u8 mask, u8 val) 
		return -ENXIO;



	mutex_lock(&chip->bus_lock);

	sec_access = (addr & 0x00FF) > 0xD0;

	sec_access = (addr & 0x00FF) > 0xB8;

	if (sec_access) {

		rc = regmap_write(chip->regmap, (addr & 0xFF00) | 0xD0, 0xA5);

		if (rc < 0) {

drivers/power/supply/qcom/qpnp-fg-gen3.c

+39 −0
Original line number Diff line number Diff line
@@ -23,6 +23,7 @@ 
#include <linux/thermal.h>

#include <linux/iio/consumer.h>

#include <linux/qpnp/qpnp-revid.h>

#include <linux/qpnp/qpnp-misc.h>

#include "fg-core.h"

#include "fg-reg.h"
@@ -4240,6 +4241,22 @@ static int fg_notifier_cb(struct notifier_block *nb, 
	return NOTIFY_OK;

}



static int twm_notifier_cb(struct notifier_block *nb,

				unsigned long action, void *data)

{

	struct fg_chip *chip = container_of(nb, struct fg_chip, twm_nb);



	if (action != PMIC_TWM_CLEAR &&

			action != PMIC_TWM_ENABLE) {

		pr_debug("Unsupported option %lu\n", action);

		return NOTIFY_OK;

	}



	chip->twm_state = (u8)action;



	return NOTIFY_OK;

}



static enum power_supply_property fg_psy_props[] = {

	POWER_SUPPLY_PROP_CAPACITY,

	POWER_SUPPLY_PROP_CAPACITY_RAW,
@@ -5555,6 +5572,9 @@ static int fg_parse_dt(struct fg_chip *chip) 
	chip->dt.disable_esr_pull_dn = of_property_read_bool(node,

					"qcom,fg-disable-esr-pull-dn");



	chip->dt.disable_fg_twm = of_property_read_bool(node,

					"qcom,fg-disable-in-twm");



	return 0;

}
@@ -5770,6 +5790,11 @@ static int fg_gen3_probe(struct platform_device *pdev) 
		goto exit;

	}



	chip->twm_nb.notifier_call = twm_notifier_cb;

	rc = qpnp_misc_twm_notifier_register(&chip->twm_nb);

	if (rc < 0)

		pr_err("Failed to register twm_notifier_cb rc=%d\n", rc);



	rc = fg_register_interrupts(chip);

	if (rc < 0) {

		dev_err(chip->dev, "Error in registering interrupts, rc:%d\n",
@@ -5892,6 +5917,7 @@ static void fg_gen3_shutdown(struct platform_device *pdev) 
{

	struct fg_chip *chip = dev_get_drvdata(&pdev->dev);

	int rc, bsoc;

	u8 mask;



	if (chip->charge_full) {

		rc = fg_get_sram_prop(chip, FG_SRAM_BATT_SOC, &bsoc);
@@ -5915,6 +5941,19 @@ static void fg_gen3_shutdown(struct platform_device *pdev) 
	if (rc < 0)

		pr_err("Error in setting ESR timer at shutdown, rc=%d\n", rc);



	if (chip->twm_state == PMIC_TWM_ENABLE && chip->dt.disable_fg_twm) {

		rc = fg_masked_write(chip, BATT_SOC_EN_CTL(chip),

					FG_ALGORITHM_EN_BIT, 0);

		if (rc < 0)

			pr_err("Error in disabling FG rc=%d\n", rc);



		mask = BCL_RST_BIT | MEM_RST_BIT | ALG_RST_BIT;

		rc = fg_masked_write(chip, BATT_SOC_RST_CTRL0(chip),

					mask, mask);

		if (rc < 0)

			pr_err("Error in disabling FG resets rc=%d\n", rc);

	}



	fg_cleanup(chip);

}