Commit 9f8fcf38 authored Jan 18, 2008 by Chris Zankel

[XTENSA] Fix cache flush macro for D$/I$ aliasing/non-aliasing



For configurations that have aliasing in the data cache but
not in the instruction cache, we don't need to flush the
instruction cache. Thus, we didn't define the macros to
flush the instruction cache. Some cache-flush functions,
howerver, were using those macros.

Signed-off-by: Chris Zankel <chris@zankel.net>

parent 67926257

include/asm-xtensa/cacheflush.h

+2 −0

Original line number	Diff line number	Diff line
		@@ -70,6 +70,8 @@ extern void __flush_invalidate_dcache_page_alias(unsigned long, unsigned long);
		#endif
		#if (ICACHE_WAY_SIZE > PAGE_SIZE)
		extern void __invalidate_icache_page_alias(unsigned long, unsigned long);
		#else
		# define __invalidate_icache_page_alias(v,p) do { } while(0)
		#endif

		/*