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Commit 9f55eb92 authored by Fugang Duan's avatar Fugang Duan Committed by Shawn Guo
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ARM: imx6ul: add fec bits to GPR syscon definition 



FEC requires additional bits to select refrence clock.

Signed-off-by: default avatarFugang Duan <B38611@freescale.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent cec13c26

include/linux/mfd/syscon/imx6q-iomuxc-gpr.h

+8 −0
Original line number Diff line number Diff line
@@ -435,4 +435,12 @@ 
#define IMX6SX_GPR5_DISP_MUX_DCIC1_LVDS			(0x1 << 1)

#define IMX6SX_GPR5_DISP_MUX_DCIC1_MASK			(0x1 << 1)



/* For imx6ul iomux gpr register field define */

#define IMX6UL_GPR1_ENET1_CLK_DIR		(0x1 << 17)

#define IMX6UL_GPR1_ENET2_CLK_DIR		(0x1 << 18)

#define IMX6UL_GPR1_ENET1_CLK_OUTPUT		(0x1 << 17)

#define IMX6UL_GPR1_ENET2_CLK_OUTPUT		(0x1 << 18)

#define IMX6UL_GPR1_ENET_CLK_DIR		(0x3 << 17)

#define IMX6UL_GPR1_ENET_CLK_OUTPUT		(0x3 << 17)



#endif /* __LINUX_IMX6Q_IOMUXC_GPR_H */