Merge "msm: kgsl: Add efuse read capabilities for A615 GPU" (9f1c7277) · Commits · e / devices / android_kernel_fairphone_FP3

drivers/gpu/msm/adreno_a6xx.c

+38 −0

Original line number	Diff line number	Diff line
		@@ -2965,6 +2965,41 @@ static int a6xx_enable_pwr_counters(struct adreno_device *adreno_dev,
		return 0;
		}

		static void a6xx_efuse_speed_bin(struct adreno_device *adreno_dev)
		{
		unsigned int val;
		unsigned int speed_bin[3];
		struct kgsl_device *device = &adreno_dev->dev;

		if (of_property_read_u32_array(device->pdev->dev.of_node,
		"qcom,gpu-speed-bin", speed_bin, 3))
		return;

		adreno_efuse_read_u32(adreno_dev, speed_bin[0], &val);

		adreno_dev->speed_bin = (val & speed_bin[1]) >> speed_bin[2];
		}

		static const struct {
		int (check)(struct adreno_device adreno_dev);
		void (func)(struct adreno_device adreno_dev);
		} a6xx_efuse_funcs[] = {
		{ adreno_is_a615, a6xx_efuse_speed_bin },
		};

		static void a6xx_check_features(struct adreno_device *adreno_dev)
		{
		unsigned int i;

		if (adreno_efuse_map(adreno_dev))
		return;
		for (i = 0; i < ARRAY_SIZE(a6xx_efuse_funcs); i++) {
		if (a6xx_efuse_funcs[i].check(adreno_dev))
		a6xx_efuse_funcs[i].func(adreno_dev);
		}

		adreno_efuse_unmap(adreno_dev);
		}
		static void a6xx_platform_setup(struct adreno_device *adreno_dev)
		{
		uint64_t addr;
		@@ -2991,6 +3026,9 @@ static void a6xx_platform_setup(struct adreno_device *adreno_dev)
		} else
		gpudev->vbif_xin_halt_ctrl0_mask =
		A6XX_VBIF_XIN_HALT_CTRL0_MASK;

		/* Check efuse bits for various capabilties */
		a6xx_check_features(adreno_dev);
		}