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Commit 9dd7a57e authored Mar 14, 2016 by Marcin Wojtas Committed by David S. Miller Mar 14, 2016

ARM: dts: armada-xp: enable buffer manager support on Armada XP boards

Since mvneta driver supports using hardware buffer management (BM), in
order to use it, board files have to be adjusted accordingly. This commit
enables BM on AXP-DB and AXP-GP in same manner - because number of ports
on those boards is the same as number of possible pools, each port is
supposed to use single pool for all kind of packets.

Moreover appropriate entry is added to 'soc' node ranges, as well as "okay"
status for 'bm' and 'bm-bppi' (internal SRAM) nodes.

Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

parent ebae1376

arch/arm/boot/dts/armada-xp-db.dts

+18 −1

Original line number	Diff line number	Diff line
		@@ -77,7 +77,8 @@
		MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
		MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000
		MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
		MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
		MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000
		MBUS_ID(0x0c, 0x04) 0 0 0xf1200000 0x100000>;

		devbus-bootcs {
		status = "okay";
		@@ -181,21 +182,33 @@
		status = "okay";
		phy = <&phy0>;
		phy-mode = "rgmii-id";
		buffer-manager = <&bm>;
		bm,pool-long = <0>;
		};
		ethernet@74000 {
		status = "okay";
		phy = <&phy1>;
		phy-mode = "rgmii-id";
		buffer-manager = <&bm>;
		bm,pool-long = <1>;
		};
		ethernet@30000 {
		status = "okay";
		phy = <&phy2>;
		phy-mode = "sgmii";
		buffer-manager = <&bm>;
		bm,pool-long = <2>;
		};
		ethernet@34000 {
		status = "okay";
		phy = <&phy3>;
		phy-mode = "sgmii";
		buffer-manager = <&bm>;
		bm,pool-long = <3>;
		};

		bm@c0000 {
		status = "okay";
		};

		mvsdio@d4000 {
		@@ -230,5 +243,9 @@
		};
		};
		};

		bm-bppi {
		status = "okay";
		};
		};
		};

arch/arm/boot/dts/armada-xp-gp.dts

+18 −1

Original line number	Diff line number	Diff line
		@@ -96,7 +96,8 @@
		MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
		MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000
		MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
		MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
		MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000
		MBUS_ID(0x0c, 0x04) 0 0 0xf1200000 0x100000>;

		devbus-bootcs {
		status = "okay";
		@@ -196,21 +197,29 @@
		status = "okay";
		phy = <&phy0>;
		phy-mode = "qsgmii";
		buffer-manager = <&bm>;
		bm,pool-long = <0>;
		};
		ethernet@74000 {
		status = "okay";
		phy = <&phy1>;
		phy-mode = "qsgmii";
		buffer-manager = <&bm>;
		bm,pool-long = <1>;
		};
		ethernet@30000 {
		status = "okay";
		phy = <&phy2>;
		phy-mode = "qsgmii";
		buffer-manager = <&bm>;
		bm,pool-long = <2>;
		};
		ethernet@34000 {
		status = "okay";
		phy = <&phy3>;
		phy-mode = "qsgmii";
		buffer-manager = <&bm>;
		bm,pool-long = <3>;
		};

		/* Front-side USB slot */
		@@ -235,6 +244,10 @@
		};
		};

		bm@c0000 {
		status = "okay";
		};

		nand@d0000 {
		status = "okay";
		num-cs = <1>;
		@@ -243,5 +256,9 @@
		nand-on-flash-bbt;
		};
		};

		bm-bppi {
		status = "okay";
		};
		};
		};