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Commit 9d945f89 authored by Javier Martinez Canillas's avatar Javier Martinez Canillas Committed by Tony Lindgren
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ARM: dts: am335x-chilisom: Use AM33XX_IOPAD pinmux macro 



Use the pinmux IOPAD macro to define the register absolute physical
address instead of the offset from the padconf base address. This
makes the DTS easier to read since matches the addresses listed in
the Technical Reference Manual.

Signed-off-by: default avatarJavier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent d5d4dc17

arch/arm/boot/dts/am335x-chilisom.dtsi

+40 −40
Original line number Diff line number Diff line
@@ -29,81 +29,81 @@ 


	i2c0_pins: pinmux_i2c0_pins {

		pinctrl-single,pins = <

			0x188 (PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_sda.i2c0_sda */

			0x18c (PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_scl.i2c0_scl */

			AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_sda.i2c0_sda */

			AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_scl.i2c0_scl */

		>;

	};



	uart0_pins: pinmux_uart0_pins {

		pinctrl-single,pins = <

			0x170 (PIN_INPUT_PULLUP | MUX_MODE0)	/* uart0_rxd.uart0_rxd */

			0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart0_txd.uart0_txd */

			AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart0_rxd.uart0_rxd */

			AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart0_txd.uart0_txd */

		>;

	};



	cpsw_default: cpsw_default {

		pinctrl-single,pins = <

			/* Slave 1 */

			0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1)  /* mii1_crs.rmii1_crs */

			0x110 (PIN_INPUT_PULLUP | MUX_MODE1)	/* mii1_rxerr.rmii1_rxerr */

			0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)	/* mii1_txen.rmii1_txen */

			0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)	/* mii1_txd1.rmii1_txd1 */

			0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)	/* mii1_txd0.rmii1_txd0 */

			0x13c (PIN_INPUT_PULLUP | MUX_MODE1)	/* mii1_rxd1.rmii1_rxd1 */

			0x140 (PIN_INPUT_PULLUP | MUX_MODE1)	/* mii1_rxd0.rmii1_rxd0 */

			0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0)	/* rmii1_ref_clk.rmii_ref_clk */

			AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE1)  /* mii1_crs.rmii1_crs */

			AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE1)	/* mii1_rxerr.rmii1_rxerr */

			AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE1)	/* mii1_txen.rmii1_txen */

			AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE1)	/* mii1_txd1.rmii1_txd1 */

			AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE1)	/* mii1_txd0.rmii1_txd0 */

			AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE1)	/* mii1_rxd1.rmii1_rxd1 */

			AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE1)	/* mii1_rxd0.rmii1_rxd0 */

			AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* rmii1_ref_clk.rmii_ref_clk */

		>;

	};



	cpsw_sleep: cpsw_sleep {

		pinctrl-single,pins = <

			/* Slave 1 reset value */

			0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)

			0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)

			0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)

			0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)

			0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)

			0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)

			0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)

			0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)

			0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)

			AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)

			AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)

			AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)

			AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)

			AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)

			AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)

			AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)

			AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)

			AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)

		>;

	};



	davinci_mdio_default: davinci_mdio_default {

		pinctrl-single,pins = <

			/* mdio_data.mdio_data */

			0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)

			AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)

			/* mdio_clk.mdio_clk */

			0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)

			AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)

		>;

	};



	davinci_mdio_sleep: davinci_mdio_sleep {

		pinctrl-single,pins = <

			/* MDIO reset value */

			0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)

			0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)

			AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)

			AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)

		>;

	};



	nandflash_pins: nandflash_pins {

		pinctrl-single,pins = <

			0x00 (PIN_INPUT_PULLDOWN | MUX_MODE0)	/* gpmc_ad0.gpmc_ad0 */

			0x04 (PIN_INPUT_PULLDOWN | MUX_MODE0)	/* gpmc_ad1.gpmc_ad1 */

			0x08 (PIN_INPUT_PULLDOWN | MUX_MODE0)	/* gpmc_ad2.gpmc_ad2 */

			0x0c (PIN_INPUT_PULLDOWN | MUX_MODE0)	/* gpmc_ad3.gpmc_ad3 */

			0x10 (PIN_INPUT_PULLDOWN | MUX_MODE0)	/* gpmc_ad4.gpmc_ad4 */

			0x14 (PIN_INPUT_PULLDOWN | MUX_MODE0)	/* gpmc_ad5.gpmc_ad5 */

			0x18 (PIN_INPUT_PULLDOWN | MUX_MODE0)	/* gpmc_ad6.gpmc_ad6 */

			0x1c (PIN_INPUT_PULLDOWN | MUX_MODE0)	/* gpmc_ad7.gpmc_ad7 */



			0x70 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_wait0.gpmc_wait0 */

			0x7c (PIN_OUTPUT_PULLUP | MUX_MODE0)	/* gpmc_csn0.gpmc_csn0 */

			0x90 (PIN_OUTPUT_PULLUP | MUX_MODE0)	/* gpmc_advn_ale.gpmc_advn_ale */

			0x94 (PIN_OUTPUT_PULLUP | MUX_MODE0)	/* gpmc_oen_ren.gpmc_oen_ren */

			0x98 (PIN_OUTPUT_PULLUP | MUX_MODE0)	/* gpmc_wen.gpmc_wen */

			0x9c (PIN_OUTPUT_PULLUP | MUX_MODE0)	/* gpmc_be0n_cle.gpmc_be0n_cle */

			AM33XX_IOPAD(0x800, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* gpmc_ad0.gpmc_ad0 */

			AM33XX_IOPAD(0x804, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* gpmc_ad1.gpmc_ad1 */

			AM33XX_IOPAD(0x808, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* gpmc_ad2.gpmc_ad2 */

			AM33XX_IOPAD(0x80c, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* gpmc_ad3.gpmc_ad3 */

			AM33XX_IOPAD(0x810, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* gpmc_ad4.gpmc_ad4 */

			AM33XX_IOPAD(0x814, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* gpmc_ad5.gpmc_ad5 */

			AM33XX_IOPAD(0x818, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* gpmc_ad6.gpmc_ad6 */

			AM33XX_IOPAD(0x81c, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* gpmc_ad7.gpmc_ad7 */



			AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_wait0.gpmc_wait0 */

			AM33XX_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE0)	/* gpmc_csn0.gpmc_csn0 */

			AM33XX_IOPAD(0x890, PIN_OUTPUT_PULLUP | MUX_MODE0)	/* gpmc_advn_ale.gpmc_advn_ale */

			AM33XX_IOPAD(0x894, PIN_OUTPUT_PULLUP | MUX_MODE0)	/* gpmc_oen_ren.gpmc_oen_ren */

			AM33XX_IOPAD(0x898, PIN_OUTPUT_PULLUP | MUX_MODE0)	/* gpmc_wen.gpmc_wen */

			AM33XX_IOPAD(0x89c, PIN_OUTPUT_PULLUP | MUX_MODE0)	/* gpmc_be0n_cle.gpmc_be0n_cle */

		>;

	};

};