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Commit 9d202783 authored by Gregory CLEMENT's avatar Gregory CLEMENT Committed by Thomas Petazzoni
Browse files

clk: armada-370-xp: add support for clock framework 



Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by Gregory CLEMENT <gregory.clement@free-electrons.com>
parent c4c34d60

arch/arm/boot/dts/armada-370.dtsi

+15 −0
Original line number Diff line number Diff line
@@ -75,5 +75,20 @@ 
			#interrupts-cells = <2>;

			interrupts = <91>;

		};



		coreclk: mvebu-sar@d0018230 {

			compatible = "marvell,armada-370-core-clock";

			reg = <0xd0018230 0x08>;

			#clock-cells = <1>;

		};



		gateclk: clock-gating-control@d0018220 {

			compatible = "marvell,armada-370-gating-clock";

			reg = <0xd0018220 0x4>;

			clocks = <&coreclk 0>;

			#clock-cells = <1>;

		};





	};

};

arch/arm/boot/dts/armada-xp-mv78230.dtsi

+12 −0
Original line number Diff line number Diff line
@@ -24,6 +24,18 @@ 
		gpio1 = &gpio1;

	};



	cpus {

	    #address-cells = <1>;

	    #size-cells = <0>;



	    cpu@0 {

		device_type = "cpu";

		compatible = "marvell,sheeva-v7";

		reg = <0>;

		clocks = <&cpuclk 0>;

	    };

	}



	soc {

		pinctrl {

			compatible = "marvell,mv78230-pinctrl";

arch/arm/boot/dts/armada-xp-mv78260.dtsi

+19 −0
Original line number Diff line number Diff line
@@ -25,6 +25,25 @@ 
		gpio2 = &gpio2;

	};



	cpus {

	    #address-cells = <1>;

	    #size-cells = <0>;



	    cpu@0 {

		device_type = "cpu";

		compatible = "marvell,sheeva-v7";

		reg = <0>;

		clocks = <&cpuclk 0>;

	    };



	    cpu@1 {

		device_type = "cpu";

		compatible = "marvell,sheeva-v7";

		reg = <1>;

		clocks = <&cpuclk 1>;

	    };

	};



	soc {

		pinctrl {

			compatible = "marvell,mv78260-pinctrl";

arch/arm/boot/dts/armada-xp-mv78460.dtsi

+34 −0
Original line number Diff line number Diff line
@@ -25,6 +25,40 @@ 
		gpio2 = &gpio2;

	};





	cpus {

	    #address-cells = <1>;

	    #size-cells = <0>;



	    cpu@0 {

		device_type = "cpu";

		compatible = "marvell,sheeva-v7";

		reg = <0>;

		clocks = <&cpuclk 0>;

	    };



	    cpu@1 {

		device_type = "cpu";

		compatible = "marvell,sheeva-v7";

		reg = <1>;

		clocks = <&cpuclk 1>;

	    };



	    cpu@2 {

		device_type = "cpu";

		compatible = "marvell,sheeva-v7";

		reg = <2>;

		clocks = <&cpuclk 2>;

	    };



	    cpu@3 {

		device_type = "cpu";

		compatible = "marvell,sheeva-v7";

		reg = <3>;

		clocks = <&cpuclk 3>;

	    };

	};



	soc {

		pinctrl {

			compatible = "marvell,mv78460-pinctrl";

arch/arm/boot/dts/armada-xp.dtsi

+20 −0
Original line number Diff line number Diff line
@@ -47,6 +47,26 @@ 
				marvell,timer-25Mhz;

		};



		coreclk: mvebu-sar@d0018230 {

			compatible = "marvell,armada-xp-core-clock";

			reg = <0xd0018230 0x08>;

			#clock-cells = <1>;

		};



		cpuclk: clock-complex@d0018700 {

			#clock-cells = <1>;

			compatible = "marvell,armada-xp-cpu-clock";

			reg = <0xd0018700 0xA0>;

			clocks = <&coreclk 1>;

		};



		gateclk: clock-gating-control@d0018220 {

			compatible = "marvell,armada-xp-gating-clock";

			reg = <0xd0018220 0x4>;

			clocks = <&coreclk 0>;

			#clock-cells = <1>;

		};



		system-controller@d0018200 {

				compatible = "marvell,armada-370-xp-system-controller";

				reg = <0xd0018200 0x500>;