Loading arch/arm64/boot/dts/qcom/msm8953.dtsi +5 −5 Original line number Diff line number Diff line Loading @@ -524,13 +524,13 @@ clock-names = "core_clk_src", "core_clk", "iface_clk", "bus_clk"; qcom,ce-opp-freq = <100000000>; status = "disabled"; status = "okay"; }; qcom_tzlog: tz-log@08600720 { compatible = "qcom,tz-log"; reg = <0x08600720 0x2000>; status = "disabled"; status = "okay"; }; qcom_rng: qrng@e3000 { Loading @@ -546,7 +546,7 @@ <1 618 0 800>; /* 100 MB/s */ clocks = <&clock_gcc clk_gcc_prng_ahb_clk>; clock-names = "iface_clk"; status = "disabled"; status = "okay"; }; qcom_crypto: qcrypto@720000 { Loading Loading @@ -579,7 +579,7 @@ qcom,use-sw-hmac-algo; qcom,use-sw-aead-algo; qcom,ce-opp-freq = <100000000>; status = "disabled"; status = "okay"; }; qcom_cedev: qcedev@720000 { Loading @@ -605,7 +605,7 @@ clock-names = "core_clk_src", "core_clk", "iface_clk", "bus_clk"; qcom,ce-opp-freq = <100000000>; status = "disabled"; status = "okay"; }; blsp1_uart0: serial@78af000 { Loading Loading
arch/arm64/boot/dts/qcom/msm8953.dtsi +5 −5 Original line number Diff line number Diff line Loading @@ -524,13 +524,13 @@ clock-names = "core_clk_src", "core_clk", "iface_clk", "bus_clk"; qcom,ce-opp-freq = <100000000>; status = "disabled"; status = "okay"; }; qcom_tzlog: tz-log@08600720 { compatible = "qcom,tz-log"; reg = <0x08600720 0x2000>; status = "disabled"; status = "okay"; }; qcom_rng: qrng@e3000 { Loading @@ -546,7 +546,7 @@ <1 618 0 800>; /* 100 MB/s */ clocks = <&clock_gcc clk_gcc_prng_ahb_clk>; clock-names = "iface_clk"; status = "disabled"; status = "okay"; }; qcom_crypto: qcrypto@720000 { Loading Loading @@ -579,7 +579,7 @@ qcom,use-sw-hmac-algo; qcom,use-sw-aead-algo; qcom,ce-opp-freq = <100000000>; status = "disabled"; status = "okay"; }; qcom_cedev: qcedev@720000 { Loading @@ -605,7 +605,7 @@ clock-names = "core_clk_src", "core_clk", "iface_clk", "bus_clk"; qcom,ce-opp-freq = <100000000>; status = "disabled"; status = "okay"; }; blsp1_uart0: serial@78af000 { Loading