Commit 9adb15b8 authored Sep 08, 2009 by Thomas Abraham Committed by Ben Dooks Sep 16, 2009

ARM: S3C6410: use correct divider_shift in setrate_clksrc()



In s3c64xx_setrate_clksrc() we used sclk->shift, but actually need to
use sclk->divider_shift to correctly calculate the value for the divider
register.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
[ben-linux@fluff.org: Minor re-indentation of description]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>

parent baa28e35

arch/arm/plat-s3c64xx/s3c6400-clock.c

+2 −2

Original line number	Original line	Diff line number	Diff line
	@@ -302,8 +302,8 @@ static int s3c64xx_setrate_clksrc(struct clk *clk, unsigned long rate)
	return -EINVAL;		return -EINVAL;

	val = __raw_readl(reg);		val = __raw_readl(reg);
	val &= ~(0xf << sclk->shift);		val &= ~(0xf << sclk->divider_shift);
	val \|= (div - 1) << sclk->shift;		val \|= (div - 1) << sclk->divider_shift;
	__raw_writel(val, reg);		__raw_writel(val, reg);

	return 0;		return 0;