Loading drivers/gpu/msm/adreno.h +4 −0 Original line number Diff line number Diff line Loading @@ -483,6 +483,10 @@ struct adreno_device { void *gpuhtw_llc_slice; bool gpuhtw_llc_slice_enable; unsigned int zap_loaded; unsigned int preempt_level; bool usesgmem; bool skipsaverestore; }; /** Loading drivers/gpu/msm/adreno_a6xx_preempt.c +5 −1 Original line number Diff line number Diff line Loading @@ -207,7 +207,11 @@ void a6xx_preemption_trigger(struct adreno_device *adreno_dev) uint64_t ttbr0; unsigned int contextidr; unsigned long flags; uint32_t preempt_level = 0, usesgmem = 1, skipsaverestore = 0; uint32_t preempt_level, usesgmem, skipsaverestore; preempt_level = adreno_dev->preempt_level; usesgmem = adreno_dev->usesgmem; skipsaverestore = adreno_dev->skipsaverestore; /* Put ourselves into a possible trigger state */ if (!adreno_move_preempt_state(adreno_dev, Loading drivers/gpu/msm/adreno_sysfs.c +43 −0 Original line number Diff line number Diff line Loading @@ -51,6 +51,43 @@ static unsigned int _ft_policy_show(struct adreno_device *adreno_dev) return adreno_dev->ft_policy; } static int _preempt_level_store(struct adreno_device *adreno_dev, unsigned int val) { if (val <= 2) adreno_dev->preempt_level = val; return 0; } static unsigned int _preempt_level_show(struct adreno_device *adreno_dev) { return adreno_dev->preempt_level; } static int _usesgmem_store(struct adreno_device *adreno_dev, unsigned int val) { adreno_dev->usesgmem = val ? 1 : 0; return 0; } static unsigned int _usesgmem_show(struct adreno_device *adreno_dev) { return adreno_dev->usesgmem; } static int _skipsaverestore_store(struct adreno_device *adreno_dev, unsigned int val) { adreno_dev->skipsaverestore = val ? 1 : 0; return 0; } static unsigned int _skipsaverestore_show(struct adreno_device *adreno_dev) { return adreno_dev->skipsaverestore; } static int _ft_pagefault_policy_store(struct adreno_device *adreno_dev, unsigned int val) { Loading Loading @@ -313,6 +350,9 @@ static ssize_t _sysfs_show_bool(struct device *dev, static ADRENO_SYSFS_U32(ft_policy); static ADRENO_SYSFS_U32(ft_pagefault_policy); static ADRENO_SYSFS_U32(preempt_level); static ADRENO_SYSFS_BOOL(usesgmem); static ADRENO_SYSFS_BOOL(skipsaverestore); static ADRENO_SYSFS_BOOL(ft_long_ib_detect); static ADRENO_SYSFS_BOOL(ft_hang_intr_status); static ADRENO_SYSFS_BOOL(gpu_llc_slice_enable); Loading Loading @@ -343,6 +383,9 @@ static const struct device_attribute *_attr_list[] = { &adreno_attr_throttling.attr, &adreno_attr_gpu_llc_slice_enable.attr, &adreno_attr_gpuhtw_llc_slice_enable.attr, &adreno_attr_preempt_level.attr, &adreno_attr_usesgmem.attr, &adreno_attr_skipsaverestore.attr, NULL, }; Loading Loading
drivers/gpu/msm/adreno.h +4 −0 Original line number Diff line number Diff line Loading @@ -483,6 +483,10 @@ struct adreno_device { void *gpuhtw_llc_slice; bool gpuhtw_llc_slice_enable; unsigned int zap_loaded; unsigned int preempt_level; bool usesgmem; bool skipsaverestore; }; /** Loading
drivers/gpu/msm/adreno_a6xx_preempt.c +5 −1 Original line number Diff line number Diff line Loading @@ -207,7 +207,11 @@ void a6xx_preemption_trigger(struct adreno_device *adreno_dev) uint64_t ttbr0; unsigned int contextidr; unsigned long flags; uint32_t preempt_level = 0, usesgmem = 1, skipsaverestore = 0; uint32_t preempt_level, usesgmem, skipsaverestore; preempt_level = adreno_dev->preempt_level; usesgmem = adreno_dev->usesgmem; skipsaverestore = adreno_dev->skipsaverestore; /* Put ourselves into a possible trigger state */ if (!adreno_move_preempt_state(adreno_dev, Loading
drivers/gpu/msm/adreno_sysfs.c +43 −0 Original line number Diff line number Diff line Loading @@ -51,6 +51,43 @@ static unsigned int _ft_policy_show(struct adreno_device *adreno_dev) return adreno_dev->ft_policy; } static int _preempt_level_store(struct adreno_device *adreno_dev, unsigned int val) { if (val <= 2) adreno_dev->preempt_level = val; return 0; } static unsigned int _preempt_level_show(struct adreno_device *adreno_dev) { return adreno_dev->preempt_level; } static int _usesgmem_store(struct adreno_device *adreno_dev, unsigned int val) { adreno_dev->usesgmem = val ? 1 : 0; return 0; } static unsigned int _usesgmem_show(struct adreno_device *adreno_dev) { return adreno_dev->usesgmem; } static int _skipsaverestore_store(struct adreno_device *adreno_dev, unsigned int val) { adreno_dev->skipsaverestore = val ? 1 : 0; return 0; } static unsigned int _skipsaverestore_show(struct adreno_device *adreno_dev) { return adreno_dev->skipsaverestore; } static int _ft_pagefault_policy_store(struct adreno_device *adreno_dev, unsigned int val) { Loading Loading @@ -313,6 +350,9 @@ static ssize_t _sysfs_show_bool(struct device *dev, static ADRENO_SYSFS_U32(ft_policy); static ADRENO_SYSFS_U32(ft_pagefault_policy); static ADRENO_SYSFS_U32(preempt_level); static ADRENO_SYSFS_BOOL(usesgmem); static ADRENO_SYSFS_BOOL(skipsaverestore); static ADRENO_SYSFS_BOOL(ft_long_ib_detect); static ADRENO_SYSFS_BOOL(ft_hang_intr_status); static ADRENO_SYSFS_BOOL(gpu_llc_slice_enable); Loading Loading @@ -343,6 +383,9 @@ static const struct device_attribute *_attr_list[] = { &adreno_attr_throttling.attr, &adreno_attr_gpu_llc_slice_enable.attr, &adreno_attr_gpuhtw_llc_slice_enable.attr, &adreno_attr_preempt_level.attr, &adreno_attr_usesgmem.attr, &adreno_attr_skipsaverestore.attr, NULL, }; Loading