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Commit 9a45eb69 authored by Josh Cartwright's avatar Josh Cartwright Committed by Michal Simek
Browse files

ARM: zynq: add support for ARCH_MULTIPLATFORM



The majority of changes are necessary to remove dependencies on header
files within arch/arm/mach-zynq/include/mach:

  uncompress.h
    - Deleted. It is unused for ARCH_MULTIPLATFORM builds.

  uart.h:
    - Move uart definitions out of uart.h into debug/zynq.S, which is
      now the only user

  zynq_soc.h:
    - Move SCU address definitions into common.c.
    - Other #defines, such as PERIPHERAL_CLOCK_RATE, TTC0_BASE, etc, are
      unused and can be dropped

Signed-off-by: default avatarJosh Cartwright <josh.cartwright@ni.com>
Tested-by: default avatarMichal Simek <michal.simek@xilinx.com>
parent 385f02b1
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+2 −12
Original line number Diff line number Diff line
@@ -955,18 +955,6 @@ config ARCH_VT8500
	help
	  Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.

config ARCH_ZYNQ
	bool "Xilinx Zynq ARM Cortex A9 Platform"
	select ARM_AMBA
	select ARM_GIC
	select COMMON_CLK
	select CPU_V7
	select GENERIC_CLOCKEVENTS
	select ICST
	select MIGHT_HAVE_CACHE_L2X0
	select USE_OF
	help
	  Support for Xilinx Zynq ARM Cortex A9 Platform
endchoice

menu "Multiple platform selection"
@@ -1128,6 +1116,8 @@ source "arch/arm/plat-versatile/Kconfig"

source "arch/arm/mach-w90x900/Kconfig"

source "arch/arm/mach-zynq/Kconfig"

# Definitions to make life easier
config ARCH_ACORN
	bool
+18 −2
Original line number Diff line number Diff line
@@ -12,9 +12,25 @@
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */
#define UART_CR_OFFSET		0x00  /* Control Register [8:0] */
#define UART_SR_OFFSET		0x2C  /* Channel Status [11:0] */
#define UART_FIFO_OFFSET	0x30  /* FIFO [15:0] or [7:0] */

#include <mach/zynq_soc.h>
#include <mach/uart.h>
#define UART_SR_TXFULL		0x00000010	/* TX FIFO full */
#define UART_SR_TXEMPTY		0x00000008	/* TX FIFO empty */

#define UART0_PHYS		0xE0000000
#define UART1_PHYS		0xE0001000
#define UART_SIZE		SZ_4K
#define UART_VIRT		0xF0001000

#if IS_ENABLED(CONFIG_DEBUG_ZYNQ_UART1)
# define LL_UART_PADDR		UART1_PHYS
#else
# define LL_UART_PADDR		UART0_PHYS
#endif

#define LL_UART_VADDR		UART_VIRT

		.macro	addruart, rp, rv, tmp
		ldr	\rp, =LL_UART_PADDR	@ physical
+13 −0
Original line number Diff line number Diff line
config ARCH_ZYNQ
	bool "Xilinx Zynq ARM Cortex A9 Platform" if ARCH_MULTI_V7
	select ARM_AMBA
	select ARM_GIC
	select COMMON_CLK
	select CPU_V7
	select GENERIC_CLOCKEVENTS
	select ICST
	select MIGHT_HAVE_CACHE_L2X0
	select USE_OF
	select SPARSE_IRQ
	help
	  Support for Xilinx Zynq ARM Cortex A9 Platform
+4 −4
Original line number Diff line number Diff line
@@ -30,10 +30,10 @@
#include <asm/mach/time.h>
#include <asm/mach-types.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/hardware/gic.h>
#include <asm/hardware/cache-l2x0.h>

#include <mach/zynq_soc.h>
#include "common.h"

static struct of_device_id zynq_of_bus_ids[] __initdata = {
@@ -68,9 +68,9 @@ static void __init xilinx_irq_init(void)
	of_irq_init(irq_match);
}

/* The minimum devices needed to be mapped before the VM system is up and
 * running include the GIC, UART and Timer Counter.
 */
#define SCU_PERIPH_PHYS		0xF8F00000
#define SCU_PERIPH_SIZE		SZ_8K
#define SCU_PERIPH_VIRT		(VMALLOC_END - SCU_PERIPH_SIZE)

static struct map_desc scu_desc __initdata = {
	.virtual	= SCU_PERIPH_VIRT,
+0 −25
Original line number Diff line number Diff line
/* arch/arm/mach-zynq/include/mach/uart.h
 *
 *  Copyright (C) 2011 Xilinx
 *
 * This software is licensed under the terms of the GNU General Public
 * License version 2, as published by the Free Software Foundation, and
 * may be copied, distributed, and modified under those terms.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#ifndef __MACH_UART_H__
#define __MACH_UART_H__

#define UART_CR_OFFSET		0x00  /* Control Register [8:0] */
#define UART_SR_OFFSET		0x2C  /* Channel Status [11:0] */
#define UART_FIFO_OFFSET	0x30  /* FIFO [15:0] or [7:0] */

#define UART_SR_TXFULL		0x00000010	/* TX FIFO full */
#define UART_SR_TXEMPTY		0x00000008	/* TX FIFO empty */

#endif
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