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Commit 9a065134 authored by Chandana Kishori Chiluveru's avatar Chandana Kishori Chiluveru
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ARM: dts: msm: Reduce usb core clock frequency for sdxpoorwills



Currently USB core clock clk voted at MAX NOMINAL frequency. This
change will reduce the core clk voting from NOMINAL to SVS for
better power efficiency.

Change-Id: I99be1421bae26342aafbc501e1e1fb7a87ae19e6
Signed-off-by: default avatarChandana Kishori Chiluveru <cchiluve@codeaurora.org>
parent d77ce925
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