Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 9910f5b1 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'imx-dt64-4.7' of...

Merge tag 'imx-dt64-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt64

Merge "The Freescale/NXP arm64 device tree updates for 4.7" from Shawn Guo:

 - New board support of LS1043a-QDS from Freescale/NXP
 - Add new compatible for LS1043A and LS2080A GPIO devices
 - Update device tree bindings and sources for LS2080A fsl-mc device
 - Update QSPI and DSPI support on LS1043A and LS2080A

* tag 'imx-dt64-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  arm64: dts: ls2080a: fsl-mc dt node updates
  Documentation: fsl-mc: binding updates for MSIs, ranges, PHYs
  arm64: dts: ls1043a: add the DTS node for QSPI support
  Documentation: fsl-quadspi: Add fsl,ls1043a-qspi compatible string
  arm64: dts: ls2080a: Add compatible "fsl,ls2080a-gpio" for ls2080a gpio nodes
  arm64: dts: ls1043a: Add compatible "fsl,qoriq-gpio" for ls1043a gpio nodes
  arm64: dts: ls2080a: update the DTS for QSPI and DSPI support
  Documentation: fsl: dspi: Add fsl,ls2080a-dspi compatible string
  arm64: dts: ls1043a-rdb: add the DTS for DSPI support
  arm64: dts: add LS1043a-QDS board support
  Documentation: DT: Add entry for Freescale LS1043a-QDS board
parents 19d91c04 bb4b4e93
Loading
Loading
Loading
Loading
+4 −0
Original line number Diff line number Diff line
@@ -135,6 +135,10 @@ LS1043A ARMv8 based RDB Board
Required root node properties:
    - compatible = "fsl,ls1043a-rdb", "fsl,ls1043a";

LS1043A ARMv8 based QDS Board
Required root node properties:
    - compatible = "fsl,ls1043a-qds", "fsl,ls1043a";

LS2080A ARMv8 based Simulator model
Required root node properties:
    - compatible = "fsl,ls2080a-simu", "fsl,ls2080a";
+80 −1
Original line number Diff line number Diff line
@@ -30,11 +30,90 @@ Required properties:
                        region may not be present in some scenarios, such
                        as in the device tree presented to a virtual machine.

    - msi-parent
        Value type: <phandle>
        Definition: Must be present and point to the MSI controller node
                    handling message interrupts for the MC.

    - ranges
        Value type: <prop-encoded-array>
        Definition: A standard property.  Defines the mapping between the child
                    MC address space and the parent system address space.

                    The MC address space is defined by 3 components:
                       <region type> <offset hi> <offset lo>

                    Valid values for region type are
                       0x0 - MC portals
                       0x1 - QBMAN portals

    - #address-cells
        Value type: <u32>
        Definition: Must be 3.  (see definition in 'ranges' property)

    - #size-cells
        Value type: <u32>
        Definition: Must be 1.

Sub-nodes:

        The fsl-mc node may optionally have dpmac sub-nodes that describe
        the relationship between the Ethernet MACs which belong to the MC
        and the Ethernet PHYs on the system board.

        The dpmac nodes must be under a node named "dpmacs" which contains
        the following properties:

            - #address-cells
              Value type: <u32>
              Definition: Must be present if dpmac sub-nodes are defined and must
                          have a value of 1.

            - #size-cells
              Value type: <u32>
              Definition: Must be present if dpmac sub-nodes are defined and must
                          have a value of 0.

        These nodes must have the following properties:

            - compatible
              Value type: <string>
              Definition: Must be "fsl,qoriq-mc-dpmac".

            - reg
              Value type: <prop-encoded-array>
              Definition: Specifies the id of the dpmac.

            - phy-handle
              Value type: <phandle>
              Definition: Specifies the phandle to the PHY device node associated
                          with the this dpmac.

Example:

        fsl_mc: fsl-mc@80c000000 {
                compatible = "fsl,qoriq-mc";
                reg = <0x00000008 0x0c000000 0 0x40>,    /* MC portal base */
                      <0x00000000 0x08340000 0 0x40000>; /* MC control reg */
        };
                msi-parent = <&its>;
                #address-cells = <3>;
                #size-cells = <1>;

                /*
                 * Region type 0x0 - MC portals
                 * Region type 0x1 - QBMAN portals
                 */
                ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000
                          0x1 0x0 0x0 0x8 0x18000000 0x8000000>;

                dpmacs {
                    #address-cells = <1>;
                    #size-cells = <0>;

                    dpmac@1 {
                        compatible = "fsl,qoriq-mc-dpmac";
                        reg = <1>;
                        phy-handle = <&mdio0_phy0>;
                    }
                }
        };
+2 −1
Original line number Diff line number Diff line
@@ -5,7 +5,8 @@ Required properties:
		 "fsl,imx7d-qspi", "fsl,imx6ul-qspi",
		 "fsl,ls1021a-qspi"
		 or
		 "fsl,ls2080a-qspi" followed by "fsl,ls1021a-qspi"
		 "fsl,ls2080a-qspi" followed by "fsl,ls1021a-qspi",
		 "fsl,ls1043a-qspi" followed by "fsl,ls1021a-qspi"
  - reg : the first contains the register location and length,
          the second contains the memory mapping address and length
  - reg-names: Should contain the reg names "QuadSPI" and "QuadSPI-memory"
+4 −1
Original line number Diff line number Diff line
ARM Freescale DSPI controller

Required properties:
- compatible : "fsl,vf610-dspi", "fsl,ls1021a-v1.0-dspi", "fsl,ls2085a-dspi"
- compatible : "fsl,vf610-dspi", "fsl,ls1021a-v1.0-dspi",
		"fsl,ls2085a-dspi"
		or
		"fsl,ls2080a-dspi" followed by "fsl,ls2085a-dspi"
- reg : Offset and length of the register set for the device
- interrupts : Should contain SPI controller interrupt
- clocks: from common clock binding: handle to dspi clock.
+2 −1
Original line number Diff line number Diff line
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-rdb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-simu.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb.dtb
 
always		:= $(dtb-y)
subdir-y	:= $(dts-dirs)
Loading