Loading drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.c +27 −5 Original line number Diff line number Diff line Loading @@ -1416,7 +1416,6 @@ static int dsi_enable_ulps(struct dsi_ctrl *dsi_ctrl) u32 lanes = 0; u32 ulps_lanes; if (dsi_ctrl->host_config.panel_mode == DSI_OP_CMD_MODE) lanes = dsi_ctrl->host_config.common_config.data_lanes; rc = dsi_ctrl->hw.ops.wait_for_lane_idle(&dsi_ctrl->hw, lanes); Loading Loading @@ -1458,9 +1457,7 @@ static int dsi_disable_ulps(struct dsi_ctrl *dsi_ctrl) return 0; } if (dsi_ctrl->host_config.panel_mode == DSI_OP_CMD_MODE) lanes = dsi_ctrl->host_config.common_config.data_lanes; lanes |= DSI_CLOCK_LANE; ulps_lanes = dsi_ctrl->hw.ops.ulps_ops.get_lanes_in_ulps(&dsi_ctrl->hw); Loading Loading @@ -2438,6 +2435,31 @@ int dsi_ctrl_host_timing_update(struct dsi_ctrl *dsi_ctrl) return 0; } /** * dsi_ctrl_update_host_init_state() - Update the host initialization state. * @dsi_ctrl: DSI controller handle. * @enable: boolean signifying host state. * * Update the host initialization status only while exiting from ulps during * suspend state. * * Return: error code. */ int dsi_ctrl_update_host_init_state(struct dsi_ctrl *dsi_ctrl, bool enable) { int rc = 0; u32 state = enable ? 0x1 : 0x0; rc = dsi_ctrl_check_state(dsi_ctrl, DSI_CTRL_OP_HOST_INIT, state); if (rc) { pr_err("[DSI_%d] Controller state check failed, rc=%d\n", dsi_ctrl->cell_index, rc); return rc; } dsi_ctrl_update_state(dsi_ctrl, DSI_CTRL_OP_HOST_INIT, state); return rc; } /** * dsi_ctrl_host_init() - Initialize DSI host hardware. * @dsi_ctrl: DSI controller handle. Loading drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.h +5 −0 Original line number Diff line number Diff line Loading @@ -743,4 +743,9 @@ void dsi_ctrl_irq_update(struct dsi_ctrl *dsi_ctrl, bool enable); int dsi_ctrl_get_host_engine_init_state(struct dsi_ctrl *dsi_ctrl, bool *state); /** * dsi_ctrl_update_host_init_state() - Set the host initialization state */ int dsi_ctrl_update_host_init_state(struct dsi_ctrl *dsi_ctrl, bool en); #endif /* _DSI_CTRL_H_ */ drivers/gpu/drm/msm/dsi-staging/dsi_display.c +25 −9 Original line number Diff line number Diff line Loading @@ -1933,6 +1933,14 @@ static int dsi_display_ctrl_init(struct dsi_display *display) int i; struct dsi_display_ctrl *ctrl; /* when ULPS suspend feature is enabled, we will keep the lanes in * ULPS during suspend state and clamp DSI phy. Hence while resuming * we will programe DSI controller as part of core clock enable. * After that we should not re-configure DSI controller again here for * usecases where we are resuming from ulps suspend as it might put * the HW in bad state. */ if (!display->panel->ulps_suspend_enabled || !display->ulps_enabled) { for (i = 0 ; i < display->ctrl_count; i++) { ctrl = &display->ctrl[i]; rc = dsi_ctrl_host_init(ctrl->ctrl, Loading @@ -1943,8 +1951,16 @@ static int dsi_display_ctrl_init(struct dsi_display *display) goto error_host_deinit; } } } else { for (i = 0 ; i < display->ctrl_count; i++) { ctrl = &display->ctrl[i]; rc = dsi_ctrl_update_host_init_state(ctrl->ctrl, true); if (rc) pr_debug("host init update failed rc=%d\n", rc); } } return 0; return rc; error_host_deinit: for (i = i - 1; i >= 0; i--) { ctrl = &display->ctrl[i]; Loading drivers/gpu/drm/msm/dsi-staging/dsi_phy.c +3 −5 Original line number Diff line number Diff line /* * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -694,7 +694,6 @@ static int dsi_phy_enable_ulps(struct msm_dsi_phy *phy, u32 lanes = 0; u32 ulps_lanes; if (config->panel_mode == DSI_OP_CMD_MODE) lanes = config->common_config.data_lanes; lanes |= DSI_CLOCK_LANE; Loading Loading @@ -730,7 +729,6 @@ static int dsi_phy_disable_ulps(struct msm_dsi_phy *phy, { u32 ulps_lanes, lanes = 0; if (config->panel_mode == DSI_OP_CMD_MODE) lanes = config->common_config.data_lanes; lanes |= DSI_CLOCK_LANE; Loading Loading
drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.c +27 −5 Original line number Diff line number Diff line Loading @@ -1416,7 +1416,6 @@ static int dsi_enable_ulps(struct dsi_ctrl *dsi_ctrl) u32 lanes = 0; u32 ulps_lanes; if (dsi_ctrl->host_config.panel_mode == DSI_OP_CMD_MODE) lanes = dsi_ctrl->host_config.common_config.data_lanes; rc = dsi_ctrl->hw.ops.wait_for_lane_idle(&dsi_ctrl->hw, lanes); Loading Loading @@ -1458,9 +1457,7 @@ static int dsi_disable_ulps(struct dsi_ctrl *dsi_ctrl) return 0; } if (dsi_ctrl->host_config.panel_mode == DSI_OP_CMD_MODE) lanes = dsi_ctrl->host_config.common_config.data_lanes; lanes |= DSI_CLOCK_LANE; ulps_lanes = dsi_ctrl->hw.ops.ulps_ops.get_lanes_in_ulps(&dsi_ctrl->hw); Loading Loading @@ -2438,6 +2435,31 @@ int dsi_ctrl_host_timing_update(struct dsi_ctrl *dsi_ctrl) return 0; } /** * dsi_ctrl_update_host_init_state() - Update the host initialization state. * @dsi_ctrl: DSI controller handle. * @enable: boolean signifying host state. * * Update the host initialization status only while exiting from ulps during * suspend state. * * Return: error code. */ int dsi_ctrl_update_host_init_state(struct dsi_ctrl *dsi_ctrl, bool enable) { int rc = 0; u32 state = enable ? 0x1 : 0x0; rc = dsi_ctrl_check_state(dsi_ctrl, DSI_CTRL_OP_HOST_INIT, state); if (rc) { pr_err("[DSI_%d] Controller state check failed, rc=%d\n", dsi_ctrl->cell_index, rc); return rc; } dsi_ctrl_update_state(dsi_ctrl, DSI_CTRL_OP_HOST_INIT, state); return rc; } /** * dsi_ctrl_host_init() - Initialize DSI host hardware. * @dsi_ctrl: DSI controller handle. Loading
drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.h +5 −0 Original line number Diff line number Diff line Loading @@ -743,4 +743,9 @@ void dsi_ctrl_irq_update(struct dsi_ctrl *dsi_ctrl, bool enable); int dsi_ctrl_get_host_engine_init_state(struct dsi_ctrl *dsi_ctrl, bool *state); /** * dsi_ctrl_update_host_init_state() - Set the host initialization state */ int dsi_ctrl_update_host_init_state(struct dsi_ctrl *dsi_ctrl, bool en); #endif /* _DSI_CTRL_H_ */
drivers/gpu/drm/msm/dsi-staging/dsi_display.c +25 −9 Original line number Diff line number Diff line Loading @@ -1933,6 +1933,14 @@ static int dsi_display_ctrl_init(struct dsi_display *display) int i; struct dsi_display_ctrl *ctrl; /* when ULPS suspend feature is enabled, we will keep the lanes in * ULPS during suspend state and clamp DSI phy. Hence while resuming * we will programe DSI controller as part of core clock enable. * After that we should not re-configure DSI controller again here for * usecases where we are resuming from ulps suspend as it might put * the HW in bad state. */ if (!display->panel->ulps_suspend_enabled || !display->ulps_enabled) { for (i = 0 ; i < display->ctrl_count; i++) { ctrl = &display->ctrl[i]; rc = dsi_ctrl_host_init(ctrl->ctrl, Loading @@ -1943,8 +1951,16 @@ static int dsi_display_ctrl_init(struct dsi_display *display) goto error_host_deinit; } } } else { for (i = 0 ; i < display->ctrl_count; i++) { ctrl = &display->ctrl[i]; rc = dsi_ctrl_update_host_init_state(ctrl->ctrl, true); if (rc) pr_debug("host init update failed rc=%d\n", rc); } } return 0; return rc; error_host_deinit: for (i = i - 1; i >= 0; i--) { ctrl = &display->ctrl[i]; Loading
drivers/gpu/drm/msm/dsi-staging/dsi_phy.c +3 −5 Original line number Diff line number Diff line /* * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -694,7 +694,6 @@ static int dsi_phy_enable_ulps(struct msm_dsi_phy *phy, u32 lanes = 0; u32 ulps_lanes; if (config->panel_mode == DSI_OP_CMD_MODE) lanes = config->common_config.data_lanes; lanes |= DSI_CLOCK_LANE; Loading Loading @@ -730,7 +729,6 @@ static int dsi_phy_disable_ulps(struct msm_dsi_phy *phy, { u32 ulps_lanes, lanes = 0; if (config->panel_mode == DSI_OP_CMD_MODE) lanes = config->common_config.data_lanes; lanes |= DSI_CLOCK_LANE; Loading