Loading drivers/clocksource/sh_cmt.c +16 −4 Original line number Diff line number Diff line Loading @@ -634,12 +634,18 @@ static int sh_cmt_clock_event_next(unsigned long delta, static void sh_cmt_clock_event_suspend(struct clock_event_device *ced) { pm_genpd_syscore_poweroff(&ced_to_sh_cmt(ced)->pdev->dev); struct sh_cmt_priv *p = ced_to_sh_cmt(ced); pm_genpd_syscore_poweroff(&p->pdev->dev); clk_unprepare(p->clk); } static void sh_cmt_clock_event_resume(struct clock_event_device *ced) { pm_genpd_syscore_poweron(&ced_to_sh_cmt(ced)->pdev->dev); struct sh_cmt_priv *p = ced_to_sh_cmt(ced); clk_prepare(p->clk); pm_genpd_syscore_poweron(&p->pdev->dev); } static void sh_cmt_register_clockevent(struct sh_cmt_priv *p, Loading Loading @@ -736,6 +742,10 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev) goto err2; } ret = clk_prepare(p->clk); if (ret < 0) goto err3; if (res2 && (resource_size(res2) == 4)) { /* assume both CMSTR and CMCSR to be 32-bit */ p->read_control = sh_cmt_read32; Loading Loading @@ -772,19 +782,21 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev) cfg->clocksource_rating); if (ret) { dev_err(&p->pdev->dev, "registration failed\n"); goto err3; goto err4; } p->cs_enabled = false; ret = setup_irq(irq, &p->irqaction); if (ret) { dev_err(&p->pdev->dev, "failed to request irq %d\n", irq); goto err3; goto err4; } platform_set_drvdata(pdev, p); return 0; err4: clk_unprepare(p->clk); err3: clk_put(p->clk); err2: Loading Loading
drivers/clocksource/sh_cmt.c +16 −4 Original line number Diff line number Diff line Loading @@ -634,12 +634,18 @@ static int sh_cmt_clock_event_next(unsigned long delta, static void sh_cmt_clock_event_suspend(struct clock_event_device *ced) { pm_genpd_syscore_poweroff(&ced_to_sh_cmt(ced)->pdev->dev); struct sh_cmt_priv *p = ced_to_sh_cmt(ced); pm_genpd_syscore_poweroff(&p->pdev->dev); clk_unprepare(p->clk); } static void sh_cmt_clock_event_resume(struct clock_event_device *ced) { pm_genpd_syscore_poweron(&ced_to_sh_cmt(ced)->pdev->dev); struct sh_cmt_priv *p = ced_to_sh_cmt(ced); clk_prepare(p->clk); pm_genpd_syscore_poweron(&p->pdev->dev); } static void sh_cmt_register_clockevent(struct sh_cmt_priv *p, Loading Loading @@ -736,6 +742,10 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev) goto err2; } ret = clk_prepare(p->clk); if (ret < 0) goto err3; if (res2 && (resource_size(res2) == 4)) { /* assume both CMSTR and CMCSR to be 32-bit */ p->read_control = sh_cmt_read32; Loading Loading @@ -772,19 +782,21 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev) cfg->clocksource_rating); if (ret) { dev_err(&p->pdev->dev, "registration failed\n"); goto err3; goto err4; } p->cs_enabled = false; ret = setup_irq(irq, &p->irqaction); if (ret) { dev_err(&p->pdev->dev, "failed to request irq %d\n", irq); goto err3; goto err4; } platform_set_drvdata(pdev, p); return 0; err4: clk_unprepare(p->clk); err3: clk_put(p->clk); err2: Loading