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Commit 9858a38e authored by Linus Torvalds's avatar Linus Torvalds
Browse files
* 'sh-latest' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6:
  sh: include Migo-R TS driver in Migo-R defconfig
  sh: correct definitions to access stack pointers
  sh: Tidy up SH-4A unaligned load support.
  dma: shdma: NMI support.
  sh: mach-sdk7786: Handle baseboard NMI source selection.
  sh: mach-rsk: Add polled GPIO buttons support for RSK+7203.
  sh: Break out cpuinfo_op procfs bits.
  sh: Enable optional gpiolib for all CPUs with pinmux tables.
  sh: migrate SH_CLK_MD to mode pin API.
  sh: machvec IO death.
parents abb35945 f862f904
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+10 −10
Original line number Diff line number Diff line
@@ -162,7 +162,8 @@ config ARCH_HAS_CPU_IDLE_WAIT
	def_bool y

config NO_IOPORT
	bool
	def_bool !PCI
	depends on !SH_CAYMAN && !SH_SH4202_MICRODEV

config IO_TRAPPED
	bool
@@ -275,6 +276,7 @@ config CPU_SUBTYPE_SH7203
	select CPU_HAS_FPU
	select SYS_SUPPORTS_CMT
	select SYS_SUPPORTS_MTU2
	select ARCH_WANT_OPTIONAL_GPIOLIB

config CPU_SUBTYPE_SH7206
	bool "Support SH7206 processor"
@@ -346,6 +348,7 @@ config CPU_SUBTYPE_SH7720
	select CPU_SH3
	select CPU_HAS_DSP
	select SYS_SUPPORTS_CMT
	select ARCH_WANT_OPTIONAL_GPIOLIB
	help
	  Select SH7720 if you have a SH3-DSP SH7720 CPU.

@@ -408,6 +411,7 @@ config CPU_SUBTYPE_SH7723
	select ARCH_SHMOBILE
	select ARCH_SPARSEMEM_ENABLE
	select SYS_SUPPORTS_CMT
	select ARCH_WANT_OPTIONAL_GPIOLIB
	help
	  Select SH7723 if you have an SH-MobileR2 CPU.

@@ -418,6 +422,7 @@ config CPU_SUBTYPE_SH7724
	select ARCH_SHMOBILE
	select ARCH_SPARSEMEM_ENABLE
	select SYS_SUPPORTS_CMT
	select ARCH_WANT_OPTIONAL_GPIOLIB
	help
	  Select SH7724 if you have an SH-MobileR2R CPU.

@@ -425,6 +430,7 @@ config CPU_SUBTYPE_SH7757
	bool "Support SH7757 processor"
	select CPU_SH4A
	select CPU_SHX2
	select ARCH_WANT_OPTIONAL_GPIOLIB
	help
	  Select SH7757 if you have a SH4A SH7757 CPU.

@@ -448,6 +454,7 @@ config CPU_SUBTYPE_SH7785
	select CPU_SHX2
	select ARCH_SPARSEMEM_ENABLE
	select SYS_SUPPORTS_NUMA
	select ARCH_WANT_OPTIONAL_GPIOLIB

config CPU_SUBTYPE_SH7786
	bool "Support SH7786 processor"
@@ -455,6 +462,7 @@ config CPU_SUBTYPE_SH7786
	select CPU_SHX3
	select CPU_HAS_PTEAEX
	select GENERIC_CLOCKEVENTS_BROADCAST if SMP
	select ARCH_WANT_OPTIONAL_GPIOLIB

config CPU_SUBTYPE_SHX3
	bool "Support SH-X3 processor"
@@ -479,6 +487,7 @@ config CPU_SUBTYPE_SH7722
	select ARCH_SPARSEMEM_ENABLE
	select SYS_SUPPORTS_NUMA
	select SYS_SUPPORTS_CMT
	select ARCH_WANT_OPTIONAL_GPIOLIB

config CPU_SUBTYPE_SH7366
	bool "Support SH7366 processor"
@@ -568,15 +577,6 @@ config SH_CLK_CPG_LEGACY
	def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE && \
		      !CPU_SHX3 && !CPU_SUBTYPE_SH7757

config SH_CLK_MD
	int "CPU Mode Pin Setting"
	depends on CPU_SH2
	default 6 if CPU_SUBTYPE_SH7206
	default 5 if CPU_SUBTYPE_SH7619
	default 0
	help
	  MD2 - MD0 pin setting.

source "kernel/time/Kconfig"

endmenu
+0 −2
Original line number Diff line number Diff line
@@ -29,8 +29,6 @@ unsigned short secureedge5410_ioport;
 */
static irqreturn_t eraseconfig_interrupt(int irq, void *dev_id)
{
	ctrl_delay();	/* dummy read */

	printk("SnapGear: erase switch interrupt!\n");

	return IRQ_HANDLED;
+36 −1
Original line number Diff line number Diff line
/*
 * Renesas Technology Europe RSK+ 7203 Support.
 *
 * Copyright (C) 2008 Paul Mundt
 * Copyright (C) 2008 - 2010  Paul Mundt
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
@@ -12,7 +12,9 @@
#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/smsc911x.h>
#include <linux/input.h>
#include <linux/gpio.h>
#include <linux/gpio_keys.h>
#include <linux/leds.h>
#include <asm/machvec.h>
#include <asm/io.h>
@@ -84,9 +86,42 @@ static struct platform_device led_device = {
	},
};

static struct gpio_keys_button rsk7203_gpio_keys_table[] = {
	{
		.code		= BTN_0,
		.gpio		= GPIO_PB0,
		.active_low	= 1,
		.desc		= "SW1",
	}, {
		.code		= BTN_1,
		.gpio		= GPIO_PB1,
		.active_low	= 1,
		.desc		= "SW2",
	}, {
		.code		= BTN_2,
		.gpio		= GPIO_PB2,
		.active_low	= 1,
		.desc		= "SW3",
	},
};

static struct gpio_keys_platform_data rsk7203_gpio_keys_info = {
	.buttons	= rsk7203_gpio_keys_table,
	.nbuttons	= ARRAY_SIZE(rsk7203_gpio_keys_table),
	.poll_interval	= 50, /* default to 50ms */
};

static struct platform_device keys_device = {
	.name		= "gpio-keys-polled",
	.dev		= {
		.platform_data	= &rsk7203_gpio_keys_info,
	},
};

static struct platform_device *rsk7203_devices[] __initdata = {
	&smsc911x_device,
	&led_device,
	&keys_device,
};

static int __init rsk7203_devices_setup(void)
+1 −1
Original line number Diff line number Diff line
obj-y	:= fpga.o irq.o setup.o
obj-y	:= fpga.o irq.o nmi.o setup.o

obj-$(CONFIG_GENERIC_GPIO)	+= gpio.o
obj-$(CONFIG_HAVE_SRAM_POOL)	+= sram.o
+83 −0
Original line number Diff line number Diff line
/*
 * SDK7786 FPGA NMI Support.
 *
 * Copyright (C) 2010  Paul Mundt
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 */
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <mach/fpga.h>

enum {
	NMI_MODE_MANUAL,
	NMI_MODE_AUX,
	NMI_MODE_MASKED,
	NMI_MODE_ANY,
	NMI_MODE_UNKNOWN,
};

/*
 * Default to the manual NMI switch.
 */
static unsigned int __initdata nmi_mode = NMI_MODE_ANY;

static int __init nmi_mode_setup(char *str)
{
	if (!str)
		return 0;

	if (strcmp(str, "manual") == 0)
		nmi_mode = NMI_MODE_MANUAL;
	else if (strcmp(str, "aux") == 0)
		nmi_mode = NMI_MODE_AUX;
	else if (strcmp(str, "masked") == 0)
		nmi_mode = NMI_MODE_MASKED;
	else if (strcmp(str, "any") == 0)
		nmi_mode = NMI_MODE_ANY;
	else {
		nmi_mode = NMI_MODE_UNKNOWN;
		pr_warning("Unknown NMI mode %s\n", str);
	}

	printk("Set NMI mode to %d\n", nmi_mode);
	return 0;
}
early_param("nmi_mode", nmi_mode_setup);

void __init sdk7786_nmi_init(void)
{
	unsigned int source, mask, tmp;

	switch (nmi_mode) {
	case NMI_MODE_MANUAL:
		source = NMISR_MAN_NMI;
		mask = NMIMR_MAN_NMIM;
		break;
	case NMI_MODE_AUX:
		source = NMISR_AUX_NMI;
		mask = NMIMR_AUX_NMIM;
		break;
	case NMI_MODE_ANY:
		source = NMISR_MAN_NMI | NMISR_AUX_NMI;
		mask = NMIMR_MAN_NMIM | NMIMR_AUX_NMIM;
		break;
	case NMI_MODE_MASKED:
	case NMI_MODE_UNKNOWN:
	default:
		source = mask = 0;
		break;
	}

	/* Set the NMI source */
	tmp = fpga_read_reg(NMISR);
	tmp &= ~NMISR_MASK;
	tmp |= source;
	fpga_write_reg(tmp, NMISR);

	/* And the IRQ masking */
	fpga_write_reg(NMIMR_MASK ^ mask, NMIMR);
}
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