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Commit 9748d4d2 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'omap-fixes-for-linus' of... 

Merge branch 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6

* 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6:
  OMAP3+: voltage: remove initial voltage
  OMAP4: Intialize IVA Device in addition to DSP device.
  omap: rx51: mark reserved memory earlier
  OMAP3: l3: fix for "irq 10: nobody cared" message
  arm: omap2: enable smc instruction for sleep34xx
  OMAP2/3: hwmod: fix gpio-reset timeouts seen during bootup.
  OMAP3: PM: Do not rely on ROM code to restore CM_AUTOIDLE_PLL.AUTO_PERIPH_DPLL
  OMAP2+: PM: Fix the saving of CM_AUTOIDLE_PLL register on scratchpad area
  OMAP4: clock data: Change DSS clock aliases
  OMAP2+: hwmod data: Fix wrong dma_system end address
parents fafc9929 3b1fb2ff

arch/arm/mach-omap2/Makefile

+1 −1
Original line number Original line Diff line number Diff line
@@ -68,7 +68,7 @@ obj-$(CONFIG_OMAP_SMARTREFLEX) += sr_device.o smartreflex.o 
obj-$(CONFIG_OMAP_SMARTREFLEX_CLASS3)	+= smartreflex-class3.o

obj-$(CONFIG_OMAP_SMARTREFLEX_CLASS3)	+= smartreflex-class3.o





AFLAGS_sleep24xx.o			:=-Wa,-march=armv6

AFLAGS_sleep24xx.o			:=-Wa,-march=armv6

AFLAGS_sleep34xx.o			:=-Wa,-march=armv7-a

AFLAGS_sleep34xx.o			:=-Wa,-march=armv7-a$(plus_sec)





ifeq ($(CONFIG_PM_VERBOSE),y)

ifeq ($(CONFIG_PM_VERBOSE),y)

CFLAGS_pm_bus.o				+= -DDEBUG

CFLAGS_pm_bus.o				+= -DDEBUG

arch/arm/mach-omap2/board-rx51.c

+7 −2
Original line number Original line Diff line number Diff line
@@ -141,14 +141,19 @@ static void __init rx51_init(void) 
static void __init rx51_map_io(void)

static void __init rx51_map_io(void)

{

{

	omap2_set_globals_3xxx();

	omap2_set_globals_3xxx();

	rx51_video_mem_init();

	omap34xx_map_common_io();

	omap34xx_map_common_io();

}

}





static void __init rx51_reserve(void)

{

	rx51_video_mem_init();

	omap_reserve();

}



MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")

MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")

	/* Maintainer: Lauri Leukkunen <lauri.leukkunen@nokia.com> */

	/* Maintainer: Lauri Leukkunen <lauri.leukkunen@nokia.com> */

	.boot_params	= 0x80000100,

	.boot_params	= 0x80000100,

	.reserve	= omap_reserve,

	.reserve	= rx51_reserve,

	.map_io		= rx51_map_io,

	.map_io		= rx51_map_io,

	.init_early	= rx51_init_early,

	.init_early	= rx51_init_early,

	.init_irq	= omap_init_irq,

	.init_irq	= omap_init_irq,

arch/arm/mach-omap2/clock44xx_data.c

+2 −7
Original line number Original line Diff line number Diff line
@@ -3116,14 +3116,9 @@ static struct omap_clk omap44xx_clks[] = { 
	CLK(NULL,	"dsp_fck",			&dsp_fck,	CK_443X),

	CLK(NULL,	"dsp_fck",			&dsp_fck,	CK_443X),

	CLK("omapdss_dss",	"sys_clk",			&dss_sys_clk,	CK_443X),

	CLK("omapdss_dss",	"sys_clk",			&dss_sys_clk,	CK_443X),

	CLK("omapdss_dss",	"tv_clk",			&dss_tv_clk,	CK_443X),

	CLK("omapdss_dss",	"tv_clk",			&dss_tv_clk,	CK_443X),

	CLK("omapdss_dss",	"dss_clk",			&dss_dss_clk,	CK_443X),

	CLK("omapdss_dss",	"video_clk",			&dss_48mhz_clk,	CK_443X),

	CLK("omapdss_dss",	"video_clk",			&dss_48mhz_clk,	CK_443X),

	CLK("omapdss_dss",	"fck",				&dss_fck,	CK_443X),

	CLK("omapdss_dss",	"fck",				&dss_dss_clk,	CK_443X),

	/*

	CLK("omapdss_dss",	"ick",				&dss_fck,	CK_443X),

	 * On OMAP4, DSS ick is a dummy clock; this is needed for compatibility

	 * with OMAP2/3.

	 */

	CLK("omapdss_dss",	"ick",				&dummy_ck,	CK_443X),

	CLK(NULL,	"efuse_ctrl_cust_fck",		&efuse_ctrl_cust_fck,	CK_443X),

	CLK(NULL,	"efuse_ctrl_cust_fck",		&efuse_ctrl_cust_fck,	CK_443X),

	CLK(NULL,	"emif1_fck",			&emif1_fck,	CK_443X),

	CLK(NULL,	"emif1_fck",			&emif1_fck,	CK_443X),

	CLK(NULL,	"emif2_fck",			&emif2_fck,	CK_443X),

	CLK(NULL,	"emif2_fck",			&emif2_fck,	CK_443X),

arch/arm/mach-omap2/cm2xxx_3xxx.c

+17 −0
Original line number Original line Diff line number Diff line
@@ -247,6 +247,7 @@ struct omap3_cm_regs { 
	u32 per_cm_clksel;

	u32 per_cm_clksel;

	u32 emu_cm_clksel;

	u32 emu_cm_clksel;

	u32 emu_cm_clkstctrl;

	u32 emu_cm_clkstctrl;

	u32 pll_cm_autoidle;

	u32 pll_cm_autoidle2;

	u32 pll_cm_autoidle2;

	u32 pll_cm_clksel4;

	u32 pll_cm_clksel4;

	u32 pll_cm_clksel5;

	u32 pll_cm_clksel5;
@@ -319,6 +320,15 @@ void omap3_cm_save_context(void) 
		omap2_cm_read_mod_reg(OMAP3430_EMU_MOD, CM_CLKSEL1);

		omap2_cm_read_mod_reg(OMAP3430_EMU_MOD, CM_CLKSEL1);

	cm_context.emu_cm_clkstctrl =

	cm_context.emu_cm_clkstctrl =

		omap2_cm_read_mod_reg(OMAP3430_EMU_MOD, OMAP2_CM_CLKSTCTRL);

		omap2_cm_read_mod_reg(OMAP3430_EMU_MOD, OMAP2_CM_CLKSTCTRL);

	/*

	 * As per erratum i671, ROM code does not respect the PER DPLL

	 * programming scheme if CM_AUTOIDLE_PLL.AUTO_PERIPH_DPLL == 1.

	 * In this case, even though this register has been saved in

	 * scratchpad contents, we need to restore AUTO_PERIPH_DPLL

	 * by ourselves. So, we need to save it anyway.

	 */

	cm_context.pll_cm_autoidle =

		omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE);

	cm_context.pll_cm_autoidle2 =

	cm_context.pll_cm_autoidle2 =

		omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE2);

		omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE2);

	cm_context.pll_cm_clksel4 =

	cm_context.pll_cm_clksel4 =
@@ -441,6 +451,13 @@ void omap3_cm_restore_context(void) 
			       CM_CLKSEL1);

			       CM_CLKSEL1);

	omap2_cm_write_mod_reg(cm_context.emu_cm_clkstctrl, OMAP3430_EMU_MOD,

	omap2_cm_write_mod_reg(cm_context.emu_cm_clkstctrl, OMAP3430_EMU_MOD,

			       OMAP2_CM_CLKSTCTRL);

			       OMAP2_CM_CLKSTCTRL);

	/*

	 * As per erratum i671, ROM code does not respect the PER DPLL

	 * programming scheme if CM_AUTOIDLE_PLL.AUTO_PERIPH_DPLL == 1.

	 * In this case, we need to restore AUTO_PERIPH_DPLL by ourselves.

	 */

	omap2_cm_write_mod_reg(cm_context.pll_cm_autoidle, PLL_MOD,

			       CM_AUTOIDLE);

	omap2_cm_write_mod_reg(cm_context.pll_cm_autoidle2, PLL_MOD,

	omap2_cm_write_mod_reg(cm_context.pll_cm_autoidle2, PLL_MOD,

			       CM_AUTOIDLE2);

			       CM_AUTOIDLE2);

	omap2_cm_write_mod_reg(cm_context.pll_cm_clksel4, PLL_MOD,

	omap2_cm_write_mod_reg(cm_context.pll_cm_clksel4, PLL_MOD,

arch/arm/mach-omap2/control.c

+7 −1
Original line number Original line Diff line number Diff line
@@ -316,8 +316,14 @@ void omap3_save_scratchpad_contents(void) 
			omap2_cm_read_mod_reg(WKUP_MOD, CM_CLKSEL);

			omap2_cm_read_mod_reg(WKUP_MOD, CM_CLKSEL);

	prcm_block_contents.cm_clken_pll =

	prcm_block_contents.cm_clken_pll =

			omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN);

			omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN);

	/*

	 * As per erratum i671, ROM code does not respect the PER DPLL

	 * programming scheme if CM_AUTOIDLE_PLL..AUTO_PERIPH_DPLL == 1.

	 * Then,  in anycase, clear these bits to avoid extra latencies.

	 */

	prcm_block_contents.cm_autoidle_pll =

	prcm_block_contents.cm_autoidle_pll =

			omap2_cm_read_mod_reg(PLL_MOD, OMAP3430_CM_AUTOIDLE_PLL);

			omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE) &

			~OMAP3430_AUTO_PERIPH_DPLL_MASK;

	prcm_block_contents.cm_clksel1_pll =

	prcm_block_contents.cm_clksel1_pll =

			omap2_cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL1_PLL);

			omap2_cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL1_PLL);

	prcm_block_contents.cm_clksel2_pll =

	prcm_block_contents.cm_clksel2_pll =