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Commit 9681a4e8 authored by Srinivas Kandagatla's avatar Srinivas Kandagatla Committed by Ulf Hansson
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mmc: mmci: Add Qualcomm specific register defines. 



This patch adds a Qualcomm SD Card controller specific register variations
to header file. Qualcomm SDCC controller is pl180, with slight changes in
the register layout from standard pl180 register set.

Signed-off-by: default avatarSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent c4a35769

drivers/mmc/host/mmci.h

+17 −0
Original line number Diff line number Diff line
@@ -41,6 +41,15 @@ 
/* Modified PL180 on Versatile Express platform */

#define MCI_ARM_HWFCEN		(1 << 12)



/* Modified on Qualcomm Integrations */

#define MCI_QCOM_CLK_WIDEBUS_8	(BIT(10) | BIT(11))

#define MCI_QCOM_CLK_FLOWENA	BIT(12)

#define MCI_QCOM_CLK_INVERTOUT	BIT(13)



/* select in latch data and command in */

#define MCI_QCOM_CLK_SELECT_IN_FBCLK	BIT(15)

#define MCI_QCOM_CLK_SELECT_IN_DDR_MODE	(BIT(14) | BIT(15))



#define MMCIARGUMENT		0x008

#define MMCICOMMAND		0x00c

#define MCI_CPSM_RESPONSE	(1 << 6)
@@ -54,6 +63,14 @@ 
#define MCI_ST_NIEN		(1 << 13)

#define MCI_ST_CE_ATACMD	(1 << 14)



/* Modified on Qualcomm Integrations */

#define MCI_QCOM_CSPM_DATCMD		BIT(12)

#define MCI_QCOM_CSPM_MCIABORT		BIT(13)

#define MCI_QCOM_CSPM_CCSENABLE		BIT(14)

#define MCI_QCOM_CSPM_CCSDISABLE	BIT(15)

#define MCI_QCOM_CSPM_AUTO_CMD19	BIT(16)

#define MCI_QCOM_CSPM_AUTO_CMD21	BIT(21)



#define MMCIRESPCMD		0x010

#define MMCIRESPONSE0		0x014

#define MMCIRESPONSE1		0x018